drm/nouveau/fuse: convert to new-style nvkm_subdev

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/include/nvkm/subdev/fuse.h

@@ -1,33 +1,16 @@
 #ifndef __NVKM_FUSE_H__
 #define __NVKM_FUSE_H__
 #include <core/subdev.h>
-#include <core/device.h>
 
 struct nvkm_fuse {
-	struct nvkm_subdev subdev;
 	const struct nvkm_fuse_func *func;
+	struct nvkm_subdev subdev;
+	spinlock_t lock;
 };
 
-struct nvkm_fuse_func {
-	u32 (*read)(struct nvkm_fuse *, u32 addr);
-};
-
-static inline struct nvkm_fuse *
-nvkm_fuse(void *obj)
-{
-	return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_FUSE);
-}
-
-#define nvkm_fuse_create(p, e, o, d)                                        \
-	nvkm_fuse_create_((p), (e), (o), sizeof(**d), (void **)d)
-
-int  nvkm_fuse_create_(struct nvkm_object *, struct nvkm_object *,
-			  struct nvkm_oclass *, int, void **);
-void _nvkm_fuse_dtor(struct nvkm_object *);
-int  _nvkm_fuse_init(struct nvkm_object *);
-#define _nvkm_fuse_fini _nvkm_subdev_fini
+u32 nvkm_fuse_read(struct nvkm_fuse *, u32 addr);
 
-extern struct nvkm_oclass nv50_fuse_oclass;
-extern struct nvkm_oclass gf100_fuse_oclass;
-extern struct nvkm_oclass gm107_fuse_oclass;
+int nv50_fuse_new(struct nvkm_device *, int, struct nvkm_fuse **);
+int gf100_fuse_new(struct nvkm_device *, int, struct nvkm_fuse **);
+int gm107_fuse_new(struct nvkm_device *, int, struct nvkm_fuse **);
 #endif

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

@@ -784,7 +784,7 @@ nv50_chipset = {
 	.clk = nv50_clk_new,
 	.devinit = nv50_devinit_new,
 	.fb = nv50_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = nv50_gpio_new,
 //	.i2c = nv50_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -887,7 +887,7 @@ nv84_chipset = {
 	.clk = g84_clk_new,
 	.devinit = g84_devinit_new,
 	.fb = g84_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = nv50_gpio_new,
 //	.i2c = nv50_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -918,7 +918,7 @@ nv86_chipset = {
 	.clk = g84_clk_new,
 	.devinit = g84_devinit_new,
 	.fb = g84_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = nv50_gpio_new,
 //	.i2c = nv50_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -949,7 +949,7 @@ nv92_chipset = {
 	.clk = g84_clk_new,
 	.devinit = g84_devinit_new,
 	.fb = g84_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = nv50_gpio_new,
 //	.i2c = nv50_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -980,7 +980,7 @@ nv94_chipset = {
 	.clk = g84_clk_new,
 	.devinit = g84_devinit_new,
 	.fb = g84_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -1008,7 +1008,7 @@ nv96_chipset = {
 	.bios = nvkm_bios_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 	.clk = g84_clk_new,
 //	.therm = g84_therm_new,
 //	.mxm = nv50_mxm_new,
@@ -1039,7 +1039,7 @@ nv98_chipset = {
 	.bios = nvkm_bios_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 	.clk = g84_clk_new,
 //	.therm = g84_therm_new,
 //	.mxm = nv50_mxm_new,
@@ -1073,7 +1073,7 @@ nva0_chipset = {
 	.clk = g84_clk_new,
 	.devinit = g84_devinit_new,
 	.fb = g84_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = nv50_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -1104,7 +1104,7 @@ nva3_chipset = {
 	.clk = gt215_clk_new,
 	.devinit = gt215_devinit_new,
 	.fb = gt215_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -1137,7 +1137,7 @@ nva5_chipset = {
 	.clk = gt215_clk_new,
 	.devinit = gt215_devinit_new,
 	.fb = gt215_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -1169,7 +1169,7 @@ nva8_chipset = {
 	.clk = gt215_clk_new,
 	.devinit = gt215_devinit_new,
 	.fb = gt215_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -1201,7 +1201,7 @@ nvaa_chipset = {
 	.clk = mcp77_clk_new,
 	.devinit = g98_devinit_new,
 	.fb = mcp77_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -1232,7 +1232,7 @@ nvac_chipset = {
 	.clk = mcp77_clk_new,
 	.devinit = g98_devinit_new,
 	.fb = mcp77_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -1263,7 +1263,7 @@ nvaf_chipset = {
 	.clk = gt215_clk_new,
 	.devinit = mcp89_devinit_new,
 	.fb = mcp89_fb_new,
-//	.fuse = nv50_fuse_new,
+	.fuse = nv50_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.imem = nv50_instmem_new,
@@ -1295,7 +1295,7 @@ nvc0_chipset = {
 	.clk = gf100_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gf100_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.ibus = gf100_ibus_new,
@@ -1330,7 +1330,7 @@ nvc1_chipset = {
 	.clk = gf100_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gf100_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.ibus = gf100_ibus_new,
@@ -1364,7 +1364,7 @@ nvc3_chipset = {
 	.clk = gf100_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gf100_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.ibus = gf100_ibus_new,
@@ -1398,7 +1398,7 @@ nvc4_chipset = {
 	.clk = gf100_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gf100_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.ibus = gf100_ibus_new,
@@ -1433,7 +1433,7 @@ nvc8_chipset = {
 	.clk = gf100_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gf100_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.ibus = gf100_ibus_new,
@@ -1468,7 +1468,7 @@ nvce_chipset = {
 	.clk = gf100_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gf100_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.ibus = gf100_ibus_new,
@@ -1503,7 +1503,7 @@ nvcf_chipset = {
 	.clk = gf100_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gf100_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = g94_gpio_new,
 //	.i2c = g94_i2c_new,
 //	.ibus = gf100_ibus_new,
@@ -1537,7 +1537,7 @@ nvd7_chipset = {
 	.clk = gf100_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gf100_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = gf110_gpio_new,
 //	.i2c = gf117_i2c_new,
 //	.ibus = gf100_ibus_new,
@@ -1569,7 +1569,7 @@ nvd9_chipset = {
 	.clk = gf100_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gf100_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = gf110_gpio_new,
 //	.i2c = gf110_i2c_new,
 //	.ibus = gf100_ibus_new,
@@ -1603,7 +1603,7 @@ nve4_chipset = {
 	.clk = gk104_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gk104_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gk104_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1639,7 +1639,7 @@ nve6_chipset = {
 	.clk = gk104_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gk104_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gk104_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1675,7 +1675,7 @@ nve7_chipset = {
 	.clk = gk104_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gk104_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gk104_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1709,7 +1709,7 @@ nvea_chipset = {
 	.bus = gf100_bus_new,
 	.clk = gk20a_clk_new,
 	.fb = gk20a_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.ibus = gk20a_ibus_new,
 //	.imem = gk20a_instmem_new,
 //	.ltc = gk104_ltc_new,
@@ -1735,7 +1735,7 @@ nvf0_chipset = {
 	.clk = gk104_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gk104_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gk104_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1771,7 +1771,7 @@ nvf1_chipset = {
 	.clk = gk104_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gk104_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gf110_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1807,7 +1807,7 @@ nv106_chipset = {
 	.clk = gk104_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gk104_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gk104_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1842,7 +1842,7 @@ nv108_chipset = {
 	.clk = gk104_clk_new,
 	.devinit = gf100_devinit_new,
 	.fb = gk104_fb_new,
-//	.fuse = gf100_fuse_new,
+	.fuse = gf100_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gk104_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1877,7 +1877,7 @@ nv117_chipset = {
 	.clk = gk104_clk_new,
 	.devinit = gm107_devinit_new,
 	.fb = gm107_fb_new,
-//	.fuse = gm107_fuse_new,
+	.fuse = gm107_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gf110_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1906,7 +1906,7 @@ nv124_chipset = {
 	.bus = gf100_bus_new,
 	.devinit = gm204_devinit_new,
 	.fb = gm107_fb_new,
-//	.fuse = gm107_fuse_new,
+	.fuse = gm107_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gm204_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1935,7 +1935,7 @@ nv126_chipset = {
 	.bus = gf100_bus_new,
 	.devinit = gm204_devinit_new,
 	.fb = gm107_fb_new,
-//	.fuse = gm107_fuse_new,
+	.fuse = gm107_fuse_new,
 //	.gpio = gk104_gpio_new,
 //	.i2c = gm204_i2c_new,
 //	.ibus = gk104_ibus_new,
@@ -1962,7 +1962,7 @@ nv12b_chipset = {
 	.bar = gk20a_bar_new,
 	.bus = gf100_bus_new,
 	.fb = gk20a_fb_new,
-//	.fuse = gm107_fuse_new,
+	.fuse = gm107_fuse_new,
 //	.ibus = gk20a_ibus_new,
 //	.imem = gk20a_instmem_new,
 //	.ltc = gm107_ltc_new,

drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c

@@ -30,7 +30,6 @@ gf100_identify(struct nvkm_device *device)
 	case 0xc0:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf100_mc_oclass;
@@ -56,7 +55,6 @@ gf100_identify(struct nvkm_device *device)
 	case 0xc4:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf100_mc_oclass;
@@ -82,7 +80,6 @@ gf100_identify(struct nvkm_device *device)
 	case 0xc3:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
@@ -107,7 +104,6 @@ gf100_identify(struct nvkm_device *device)
 	case 0xce:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf100_mc_oclass;
@@ -133,7 +129,6 @@ gf100_identify(struct nvkm_device *device)
 	case 0xcf:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
@@ -158,7 +153,6 @@ gf100_identify(struct nvkm_device *device)
 	case 0xc1:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
@@ -183,7 +177,6 @@ gf100_identify(struct nvkm_device *device)
 	case 0xc8:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf100_mc_oclass;
@@ -209,7 +202,6 @@ gf100_identify(struct nvkm_device *device)
 	case 0xd9:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gf110_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gf110_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
@@ -234,7 +226,6 @@ gf100_identify(struct nvkm_device *device)
 	case 0xd7:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gf110_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gf117_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c

@@ -30,7 +30,6 @@ gk104_identify(struct nvkm_device *device)
 	case 0xe4:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
@@ -57,7 +56,6 @@ gk104_identify(struct nvkm_device *device)
 	case 0xe7:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
@@ -84,7 +82,6 @@ gk104_identify(struct nvkm_device *device)
 	case 0xe6:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
@@ -110,7 +107,6 @@ gk104_identify(struct nvkm_device *device)
 		break;
 	case 0xea:
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
 		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
 		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk20a_ibus_oclass;
@@ -128,7 +124,6 @@ gk104_identify(struct nvkm_device *device)
 	case 0xf0:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
@@ -155,7 +150,6 @@ gk104_identify(struct nvkm_device *device)
 	case 0xf1:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gf110_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gf106_mc_oclass;
@@ -182,7 +176,6 @@ gk104_identify(struct nvkm_device *device)
 	case 0x106:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
@@ -208,7 +201,6 @@ gk104_identify(struct nvkm_device *device)
 	case 0x108:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gk104_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c

@@ -30,7 +30,6 @@ gm100_identify(struct nvkm_device *device)
 	case 0x117:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gf110_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gm107_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
@@ -63,7 +62,6 @@ gm100_identify(struct nvkm_device *device)
 	case 0x124:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gm204_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gm107_fuse_oclass;
 #if 0
 		/* looks to be some non-trivial changes */
 		/* priv ring says no to 0x10eb14 writes */
@@ -97,7 +95,6 @@ gm100_identify(struct nvkm_device *device)
 	case 0x126:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  gk104_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  gm204_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gm107_fuse_oclass;
 #if 0
 		/* looks to be some non-trivial changes */
 		/* priv ring says no to 0x10eb14 writes */
@@ -132,7 +129,6 @@ gm100_identify(struct nvkm_device *device)
 
 		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;
 		device->oclass[NVDEV_SUBDEV_MMU    ] = &gf100_mmu_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gm107_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
 		device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;
 		device->oclass[NVDEV_SUBDEV_IBUS   ] = &gk20a_ibus_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c

@@ -30,7 +30,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0x50:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv50_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  nv50_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;
@@ -49,7 +48,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0x84:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv50_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  nv50_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;
@@ -71,7 +69,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0x86:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv50_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  nv50_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;
@@ -93,7 +90,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0x92:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  nv50_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  nv50_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  nv50_mc_oclass;
@@ -115,7 +111,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0x94:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g94_mc_oclass;
@@ -137,7 +132,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0x96:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g94_mc_oclass;
@@ -159,7 +153,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0x98:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g98_mc_oclass;
@@ -181,7 +174,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0xa0:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  nv50_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g98_mc_oclass;
@@ -203,7 +195,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0xaa:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g98_mc_oclass;
@@ -225,7 +216,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0xac:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g98_mc_oclass;
@@ -247,7 +237,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0xa3:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g98_mc_oclass;
@@ -271,7 +260,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0xa5:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g98_mc_oclass;
@@ -294,7 +282,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0xa8:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g98_mc_oclass;
@@ -317,7 +304,6 @@ nv50_identify(struct nvkm_device *device)
 	case 0xaf:
 		device->oclass[NVDEV_SUBDEV_GPIO   ] =  g94_gpio_oclass;
 		device->oclass[NVDEV_SUBDEV_I2C    ] =  g94_i2c_oclass;
-		device->oclass[NVDEV_SUBDEV_FUSE   ] =  &nv50_fuse_oclass;
 		device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
 		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
 		device->oclass[NVDEV_SUBDEV_MC     ] =  g98_mc_oclass;

drivers/gpu/drm/nouveau/nvkm/subdev/fuse/base.c

@@ -21,26 +21,34 @@
  *
  * Authors: Martin Peres
  */
-#include <subdev/fuse.h>
+#include "priv.h"
 
-int
-_nvkm_fuse_init(struct nvkm_object *object)
+u32
+nvkm_fuse_read(struct nvkm_fuse *fuse, u32 addr)
 {
-	struct nvkm_fuse *fuse = (void *)object;
-	return nvkm_subdev_init_old(&fuse->subdev);
+	return fuse->func->read(fuse, addr);
 }
 
-void
-_nvkm_fuse_dtor(struct nvkm_object *object)
+static void *
+nvkm_fuse_dtor(struct nvkm_subdev *subdev)
 {
-	struct nvkm_fuse *fuse = (void *)object;
-	nvkm_subdev_destroy(&fuse->subdev);
+	return nvkm_fuse(subdev);
 }
 
+static const struct nvkm_subdev_func
+nvkm_fuse = {
+	.dtor = nvkm_fuse_dtor,
+};
+
 int
-nvkm_fuse_create_(struct nvkm_object *parent, struct nvkm_object *engine,
-		  struct nvkm_oclass *oclass, int length, void **pobject)
+nvkm_fuse_new_(const struct nvkm_fuse_func *func, struct nvkm_device *device,
+	       int index, struct nvkm_fuse **pfuse)
 {
-	return nvkm_subdev_create_(parent, engine, oclass, 0, "FUSE",
-				   "fuse", length, pobject);
+	struct nvkm_fuse *fuse;
+	if (!(fuse = *pfuse = kzalloc(sizeof(*fuse), GFP_KERNEL)))
+		return -ENOMEM;
+	nvkm_subdev_ctor(&nvkm_fuse, device, index, 0, &fuse->subdev);
+	fuse->func = func;
+	spin_lock_init(&fuse->lock);
+	return 0;
 }

drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.c

@@ -23,61 +23,31 @@
  */
 #include "priv.h"
 
-struct gf100_fuse {
-	struct nvkm_fuse base;
-
-	spinlock_t fuse_enable_lock;
-};
-
 static u32
-gf100_fuse_read(struct nvkm_fuse *obj, u32 addr)
+gf100_fuse_read(struct nvkm_fuse *fuse, u32 addr)
 {
-	struct gf100_fuse *fuse = container_of(obj, typeof(*fuse), base);
-	struct nvkm_device *device = fuse->base.subdev.device;
+	struct nvkm_device *device = fuse->subdev.device;
 	unsigned long flags;
 	u32 fuse_enable, unk, val;
 
 	/* racy if another part of nvkm start writing to these regs */
-	spin_lock_irqsave(&fuse->fuse_enable_lock, flags);
-	fuse_enable = nvkm_mask(device, 0x22400, 0x800, 0x800);
-	unk = nvkm_mask(device, 0x21000, 0x1, 0x1);
-	val = nvkm_rd32(device, 0x21100 + addr);
-	nvkm_wr32(device, 0x21000, unk);
-	nvkm_wr32(device, 0x22400, fuse_enable);
-	spin_unlock_irqrestore(&fuse->fuse_enable_lock, flags);
+	spin_lock_irqsave(&fuse->lock, flags);
+	fuse_enable = nvkm_mask(device, 0x022400, 0x800, 0x800);
+	unk = nvkm_mask(device, 0x021000, 0x1, 0x1);
+	val = nvkm_rd32(device, 0x021100 + addr);
+	nvkm_wr32(device, 0x021000, unk);
+	nvkm_wr32(device, 0x022400, fuse_enable);
+	spin_unlock_irqrestore(&fuse->lock, flags);
 	return val;
 }
 
 static const struct nvkm_fuse_func
-gf100_fuse_func = {
+gf100_fuse = {
 	.read = gf100_fuse_read,
 };
 
-static int
-gf100_fuse_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-		struct nvkm_oclass *oclass, void *data, u32 size,
-		struct nvkm_object **pobject)
+int
+gf100_fuse_new(struct nvkm_device *device, int index, struct nvkm_fuse **pfuse)
 {
-	struct gf100_fuse *fuse;
-	int ret;
-
-	ret = nvkm_fuse_create(parent, engine, oclass, &fuse);
-	*pobject = nv_object(fuse);
-	if (ret)
-		return ret;
-
-	spin_lock_init(&fuse->fuse_enable_lock);
-	fuse->base.func = &gf100_fuse_func;
-	return 0;
+	return nvkm_fuse_new_(&gf100_fuse, device, index, pfuse);
 }
-
-struct nvkm_oclass
-gf100_fuse_oclass = {
-	.handle = NV_SUBDEV(FUSE, 0xC0),
-	.ofuncs = &(struct nvkm_ofuncs) {
-		.ctor = gf100_fuse_ctor,
-		.dtor = _nvkm_fuse_dtor,
-		.init = _nvkm_fuse_init,
-		.fini = _nvkm_fuse_fini,
-	},
-};

drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.c

@@ -27,36 +27,16 @@ static u32
 gm107_fuse_read(struct nvkm_fuse *fuse, u32 addr)
 {
 	struct nvkm_device *device = fuse->subdev.device;
-	return nvkm_rd32(device, 0x21100 + addr);
+	return nvkm_rd32(device, 0x021100 + addr);
 }
 
 static const struct nvkm_fuse_func
-gm107_fuse_func = {
+gm107_fuse = {
 	.read = gm107_fuse_read,
 };
 
-static int
-gm107_fuse_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-		struct nvkm_oclass *oclass, void *data, u32 size,
-		struct nvkm_object **pobject)
+int
+gm107_fuse_new(struct nvkm_device *device, int index, struct nvkm_fuse **pfuse)
 {
-	struct nvkm_fuse *fuse;
-	int ret;
-
-	ret = nvkm_fuse_create(parent, engine, oclass, &fuse);
-	*pobject = nv_object(fuse);
-
-	fuse->func = &gm107_fuse_func;
-	return ret;
+	return nvkm_fuse_new_(&gm107_fuse, device, index, pfuse);
 }
-
-struct nvkm_oclass
-gm107_fuse_oclass = {
-	.handle = NV_SUBDEV(FUSE, 0x117),
-	.ofuncs = &(struct nvkm_ofuncs) {
-		.ctor = gm107_fuse_ctor,
-		.dtor = _nvkm_fuse_dtor,
-		.init = _nvkm_fuse_init,
-		.fini = _nvkm_fuse_fini,
-	},
-};

drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.c

@@ -23,59 +23,29 @@
  */
 #include "priv.h"
 
-struct nv50_fuse {
-	struct nvkm_fuse base;
-
-	spinlock_t fuse_enable_lock;
-};
-
 static u32
-nv50_fuse_read(struct nvkm_fuse *obj, u32 addr)
+nv50_fuse_read(struct nvkm_fuse *fuse, u32 addr)
 {
-	struct nv50_fuse *fuse = container_of(obj, typeof(*fuse), base);
-	struct nvkm_device *device = fuse->base.subdev.device;
+	struct nvkm_device *device = fuse->subdev.device;
 	unsigned long flags;
 	u32 fuse_enable, val;
 
 	/* racy if another part of nvkm start writing to this reg */
-	spin_lock_irqsave(&fuse->fuse_enable_lock, flags);
-	fuse_enable = nvkm_mask(device, 0x1084, 0x800, 0x800);
-	val = nvkm_rd32(device, 0x21000 + addr);
-	nvkm_wr32(device, 0x1084, fuse_enable);
-	spin_unlock_irqrestore(&fuse->fuse_enable_lock, flags);
+	spin_lock_irqsave(&fuse->lock, flags);
+	fuse_enable = nvkm_mask(device, 0x001084, 0x800, 0x800);
+	val = nvkm_rd32(device, 0x021000 + addr);
+	nvkm_wr32(device, 0x001084, fuse_enable);
+	spin_unlock_irqrestore(&fuse->lock, flags);
 	return val;
 }
 
 static const struct nvkm_fuse_func
-nv50_fuse_func = {
+nv50_fuse = {
 	.read = &nv50_fuse_read,
 };
 
-static int
-nv50_fuse_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-	       struct nvkm_oclass *oclass, void *data, u32 size,
-	       struct nvkm_object **pobject)
+int
+nv50_fuse_new(struct nvkm_device *device, int index, struct nvkm_fuse **pfuse)
 {
-	struct nv50_fuse *fuse;
-	int ret;
-
-	ret = nvkm_fuse_create(parent, engine, oclass, &fuse);
-	*pobject = nv_object(fuse);
-	if (ret)
-		return ret;
-
-	spin_lock_init(&fuse->fuse_enable_lock);
-	fuse->base.func = &nv50_fuse_func;
-	return 0;
+	return nvkm_fuse_new_(&nv50_fuse, device, index, pfuse);
 }
-
-struct nvkm_oclass
-nv50_fuse_oclass = {
-	.handle = NV_SUBDEV(FUSE, 0x50),
-	.ofuncs = &(struct nvkm_ofuncs) {
-		.ctor = nv50_fuse_ctor,
-		.dtor = _nvkm_fuse_dtor,
-		.init = _nvkm_fuse_init,
-		.fini = _nvkm_fuse_fini,
-	},
-};

drivers/gpu/drm/nouveau/nvkm/subdev/fuse/priv.h

@@ -1,7 +1,12 @@
 #ifndef __NVKM_FUSE_PRIV_H__
 #define __NVKM_FUSE_PRIV_H__
+#define nvkm_fuse(p) container_of((p), struct nvkm_fuse, subdev)
 #include <subdev/fuse.h>
 
-int _nvkm_fuse_init(struct nvkm_object *object);
-void _nvkm_fuse_dtor(struct nvkm_object *object);
+struct nvkm_fuse_func {
+	u32 (*read)(struct nvkm_fuse *, u32 addr);
+};
+
+int nvkm_fuse_new_(const struct nvkm_fuse_func *, struct nvkm_device *,
+		   int index, struct nvkm_fuse **);
 #endif

drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c

@@ -30,9 +30,8 @@ int
 g84_temp_get(struct nvkm_therm *therm)
 {
 	struct nvkm_device *device = therm->subdev.device;
-	struct nvkm_fuse *fuse = nvkm_fuse(therm);
 
-	if (fuse->func->read(fuse, 0x1a8) == 1)
+	if (nvkm_fuse_read(device->fuse, 0x1a8) == 1)
 		return nvkm_rd32(device, 0x20400);
 	else
 		return -ENODEV;
@@ -42,10 +41,9 @@ void
 g84_sensor_setup(struct nvkm_therm *therm)
 {
 	struct nvkm_device *device = therm->subdev.device;
-	struct nvkm_fuse *fuse = nvkm_fuse(therm);
 
 	/* enable temperature reading for cards with insane defaults */
-	if (fuse->func->read(fuse, 0x1a8) == 1) {
+	if (nvkm_fuse_read(device->fuse, 0x1a8) == 1) {
 		nvkm_mask(device, 0x20008, 0x80008000, 0x80000000);
 		nvkm_mask(device, 0x2000c, 0x80000003, 0x00000000);
 		mdelay(20); /* wait for the temperature to stabilize */