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@@ -595,6 +595,19 @@ out:
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return ret;
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}
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+static inline void clean_chip_info(void)
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+{
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+ kfree(chips);
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+ kfree(core_to_chip_map);
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+}
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+
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+static inline void unregister_all_notifiers(void)
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+{
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+ opal_message_notifier_unregister(OPAL_MSG_OCC,
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+ &powernv_cpufreq_opal_nb);
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+ unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
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+}
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+
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static int __init powernv_cpufreq_init(void)
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{
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int rc = 0;
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@@ -605,30 +618,35 @@ static int __init powernv_cpufreq_init(void)
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/* Discover pstates from device tree and init */
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rc = init_powernv_pstates();
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- if (rc) {
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- pr_info("powernv-cpufreq disabled. System does not support PState control\n");
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- return rc;
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- }
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+ if (rc)
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+ goto out;
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/* Populate chip info */
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rc = init_chip_info();
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if (rc)
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- return rc;
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+ goto out;
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register_reboot_notifier(&powernv_cpufreq_reboot_nb);
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opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
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- return cpufreq_register_driver(&powernv_cpufreq_driver);
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+
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+ rc = cpufreq_register_driver(&powernv_cpufreq_driver);
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+ if (!rc)
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+ return 0;
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+
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+ pr_info("Failed to register the cpufreq driver (%d)\n", rc);
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+ unregister_all_notifiers();
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+ clean_chip_info();
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+out:
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+ pr_info("Platform driver disabled. System does not support PState control\n");
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+ return rc;
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}
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module_init(powernv_cpufreq_init);
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static void __exit powernv_cpufreq_exit(void)
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{
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- unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
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- opal_message_notifier_unregister(OPAL_MSG_OCC,
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- &powernv_cpufreq_opal_nb);
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- kfree(chips);
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- kfree(core_to_chip_map);
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cpufreq_unregister_driver(&powernv_cpufreq_driver);
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+ unregister_all_notifiers();
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+ clean_chip_info();
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}
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module_exit(powernv_cpufreq_exit);
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