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drm/i915: We implement WaDisableL3Bank2xClockGate:vlv

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä 11 years ago
parent
f3ce382139
commit
c5c32cda59
1 changed files with 1 additions and 0 deletions
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  1. 1 0
      drivers/gpu/drm/i915/intel_pm.c

+ 1 - 0
drivers/gpu/drm/i915/intel_pm.c
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@@ -4981,6 +4981,7 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
 
 		   GEN6_RCPBUNIT_CLOCK_GATE_DISABLE |
 
 		   GEN6_RCPBUNIT_CLOCK_GATE_DISABLE |
 
 		   GEN6_RCCUNIT_CLOCK_GATE_DISABLE);
 
 		   GEN6_RCCUNIT_CLOCK_GATE_DISABLE);
 
 
 
+	/* WaDisableL3Bank2xClockGate:vlv */
 
 	I915_WRITE(GEN7_UCGCTL4, GEN7_L3BANK2X_CLOCK_GATE_DISABLE);
 
 	I915_WRITE(GEN7_UCGCTL4, GEN7_L3BANK2X_CLOCK_GATE_DISABLE);
 
 
 
 	I915_WRITE(MI_ARB_VLV, MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);
 
 	I915_WRITE(MI_ARB_VLV, MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);