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@@ -134,24 +134,28 @@ static const struct sunxi_desc_pin sun6i_a31_pins[] = {
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "gmac"), /* RXD4 */
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SUNXI_FUNCTION(0x3, "lcd1"), /* D15 */
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+ SUNXI_FUNCTION(0x4, "clk_out_a"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PA_EINT15 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "gmac"), /* RXD5 */
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SUNXI_FUNCTION(0x3, "lcd1"), /* D16 */
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+ SUNXI_FUNCTION(0x4, "dmic"), /* CLK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PA_EINT16 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "gmac"), /* RXD6 */
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SUNXI_FUNCTION(0x3, "lcd1"), /* D17 */
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+ SUNXI_FUNCTION(0x4, "dmic"), /* DIN */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), /* PA_EINT17 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "gmac"), /* RXD7 */
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SUNXI_FUNCTION(0x3, "lcd1"), /* D18 */
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+ SUNXI_FUNCTION(0x4, "clk_out_b"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), /* PA_EINT18 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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@@ -207,6 +211,7 @@ static const struct sunxi_desc_pin sun6i_a31_pins[] = {
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "gmac"), /* MDC */
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SUNXI_FUNCTION(0x3, "lcd1"), /* HSYNC */
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+ SUNXI_FUNCTION(0x4, "clk_out_c"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 26)), /* PA_EINT26 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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