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@@ -8350,12 +8350,12 @@ void intel_pm_setup(struct drm_i915_private *dev_priv)
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atomic_set(&dev_priv->pm.wakeref_count, 0);
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}
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-u32 intel_rc6_residency(struct drm_i915_private *dev_priv,
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- i915_reg_t reg)
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+u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,
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+ const i915_reg_t reg)
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{
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u64 raw_time; /* 32b value may overflow during fixed point math */
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- u64 units = 128ULL, div = 100000ULL;
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- u32 ret;
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+ u64 units = 128000ULL, div = 100000ULL;
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+ u64 ret;
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if (!intel_enable_rc6())
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return 0;
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@@ -8364,13 +8364,13 @@ u32 intel_rc6_residency(struct drm_i915_private *dev_priv,
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/* On VLV and CHV, residency time is in CZ units rather than 1.28us */
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if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
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- units = 1;
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+ units = 1000;
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div = dev_priv->czclk_freq;
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if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
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units <<= 8;
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} else if (IS_GEN9_LP(dev_priv)) {
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- units = 1;
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+ units = 1000;
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div = 1200; /* 833.33ns */
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}
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