|
@@ -1785,6 +1785,9 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
|
|
|
if (WARN_ON(pe->tce32_seg >= 0))
|
|
|
return;
|
|
|
|
|
|
+ tbl = pe->tce32_table;
|
|
|
+ iommu_register_group(tbl, phb->hose->global_number, pe->pe_number);
|
|
|
+
|
|
|
/* Grab a 32-bit TCE table */
|
|
|
pe->tce32_seg = base;
|
|
|
pe_info(pe, " Setting up 32-bit TCE table at %08x..%08x\n",
|
|
@@ -1819,7 +1822,6 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
|
|
|
}
|
|
|
|
|
|
/* Setup linux iommu table */
|
|
|
- tbl = pe->tce32_table;
|
|
|
pnv_pci_setup_iommu_table(tbl, addr, TCE32_TABLE_SIZE * segs,
|
|
|
base << 28, IOMMU_PAGE_SHIFT_4K);
|
|
|
|
|
@@ -1841,8 +1843,6 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
|
|
|
iommu_init_table(tbl, phb->hose->node);
|
|
|
|
|
|
if (pe->flags & PNV_IODA_PE_DEV) {
|
|
|
- iommu_register_group(tbl, phb->hose->global_number,
|
|
|
- pe->pe_number);
|
|
|
/*
|
|
|
* Setting table base here only for carrying iommu_group
|
|
|
* further down to let iommu_add_device() do the job.
|
|
@@ -1850,14 +1850,8 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
|
|
|
*/
|
|
|
set_iommu_table_base(&pe->pdev->dev, tbl);
|
|
|
iommu_add_device(&pe->pdev->dev);
|
|
|
- } else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) {
|
|
|
- iommu_register_group(tbl, phb->hose->global_number,
|
|
|
- pe->pe_number);
|
|
|
+ } else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))
|
|
|
pnv_ioda_setup_bus_dma(pe, pe->pbus);
|
|
|
- } else if (pe->flags & PNV_IODA_PE_VF) {
|
|
|
- iommu_register_group(tbl, phb->hose->global_number,
|
|
|
- pe->pe_number);
|
|
|
- }
|
|
|
|
|
|
return;
|
|
|
fail:
|
|
@@ -1924,6 +1918,9 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
|
|
|
if (WARN_ON(pe->tce32_seg >= 0))
|
|
|
return;
|
|
|
|
|
|
+ tbl = pe->tce32_table;
|
|
|
+ iommu_register_group(tbl, phb->hose->global_number, pe->pe_number);
|
|
|
+
|
|
|
/* The PE will reserve all possible 32-bits space */
|
|
|
pe->tce32_seg = 0;
|
|
|
end = (1 << ilog2(phb->ioda.m32_pci_base));
|
|
@@ -1955,7 +1952,6 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
|
|
|
}
|
|
|
|
|
|
/* Setup linux iommu table */
|
|
|
- tbl = pe->tce32_table;
|
|
|
pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0,
|
|
|
IOMMU_PAGE_SHIFT_4K);
|
|
|
|
|
@@ -1975,8 +1971,6 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
|
|
|
iommu_init_table(tbl, phb->hose->node);
|
|
|
|
|
|
if (pe->flags & PNV_IODA_PE_DEV) {
|
|
|
- iommu_register_group(tbl, phb->hose->global_number,
|
|
|
- pe->pe_number);
|
|
|
/*
|
|
|
* Setting table base here only for carrying iommu_group
|
|
|
* further down to let iommu_add_device() do the job.
|
|
@@ -1984,14 +1978,8 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
|
|
|
*/
|
|
|
set_iommu_table_base(&pe->pdev->dev, tbl);
|
|
|
iommu_add_device(&pe->pdev->dev);
|
|
|
- } else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) {
|
|
|
- iommu_register_group(tbl, phb->hose->global_number,
|
|
|
- pe->pe_number);
|
|
|
+ } else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL))
|
|
|
pnv_ioda_setup_bus_dma(pe, pe->pbus);
|
|
|
- } else if (pe->flags & PNV_IODA_PE_VF) {
|
|
|
- iommu_register_group(tbl, phb->hose->global_number,
|
|
|
- pe->pe_number);
|
|
|
- }
|
|
|
|
|
|
/* Also create a bypass window */
|
|
|
if (!pnv_iommu_bypass_disabled)
|