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@@ -77,34 +77,23 @@ static inline bool __cpu_uses_extended_idmap(void)
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unlikely(idmap_t0sz != TCR_T0SZ(VA_BITS)));
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}
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-static inline void __cpu_set_tcr_t0sz(u64 t0sz)
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-{
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- unsigned long tcr;
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-
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- if (__cpu_uses_extended_idmap())
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- asm volatile (
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- " mrs %0, tcr_el1 ;"
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- " bfi %0, %1, %2, %3 ;"
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- " msr tcr_el1, %0 ;"
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- " isb"
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- : "=&r" (tcr)
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- : "r"(t0sz), "I"(TCR_T0SZ_OFFSET), "I"(TCR_TxSZ_WIDTH));
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-}
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-
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-/*
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- * Set TCR.T0SZ to the value appropriate for activating the identity map.
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- */
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-static inline void cpu_set_idmap_tcr_t0sz(void)
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-{
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- __cpu_set_tcr_t0sz(idmap_t0sz);
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-}
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-
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/*
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* Set TCR.T0SZ to its default value (based on VA_BITS)
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*/
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static inline void cpu_set_default_tcr_t0sz(void)
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{
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- __cpu_set_tcr_t0sz(TCR_T0SZ(VA_BITS));
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+ unsigned long tcr;
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+
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+ if (!__cpu_uses_extended_idmap())
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+ return;
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+
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+ asm volatile (
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+ " mrs %0, tcr_el1 ;"
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+ " bfi %0, %1, %2, %3 ;"
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+ " msr tcr_el1, %0 ;"
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+ " isb"
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+ : "=&r" (tcr)
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+ : "r"(TCR_T0SZ(VA_BITS)), "I"(TCR_T0SZ_OFFSET), "I"(TCR_TxSZ_WIDTH));
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}
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static inline void switch_new_context(struct mm_struct *mm)
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