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@@ -286,6 +286,11 @@
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clock-names = "stmmaceth";
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};
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+&gpio_intc {
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+ compatible = "amlogic,meson8-gpio-intc", "amlogic,meson-gpio-intc";
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+ status = "okay";
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+};
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+
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&hwrng {
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compatible = "amlogic,meson8-rng", "amlogic,meson-rng";
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clocks = <&clkc CLKID_RNG0>;
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@@ -308,6 +313,9 @@
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arm,data-latency = <3 3 3>;
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arm,tag-latency = <2 2 2>;
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arm,filter-ranges = <0x100000 0xc0000000>;
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+ prefetch-data = <1>;
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+ prefetch-instr = <1>;
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+ arm,shared-override;
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};
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&pwm_ab {
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@@ -321,9 +329,8 @@
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&saradc {
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compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc";
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clocks = <&clkc CLKID_XTAL>,
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- <&clkc CLKID_SAR_ADC>,
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- <&clkc CLKID_SANA>;
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- clock-names = "clkin", "core", "sana";
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+ <&clkc CLKID_SAR_ADC>;
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+ clock-names = "clkin", "core";
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};
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&sdio {
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@@ -337,19 +344,27 @@
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};
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&uart_AO {
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- clocks = <&clkc CLKID_CLK81>;
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+ compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
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+ clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
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+ clock-names = "baud", "xtal", "pclk";
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};
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&uart_A {
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- clocks = <&clkc CLKID_CLK81>;
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+ compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
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+ clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>;
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+ clock-names = "baud", "xtal", "pclk";
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};
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&uart_B {
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- clocks = <&clkc CLKID_CLK81>;
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+ compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
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+ clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>;
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+ clock-names = "baud", "xtal", "pclk";
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};
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&uart_C {
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- clocks = <&clkc CLKID_CLK81>;
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+ compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
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+ clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>;
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+ clock-names = "baud", "xtal", "pclk";
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};
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&usb0 {
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