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@@ -2034,6 +2034,24 @@ hsw_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)
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return c;
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return c;
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}
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}
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+/*
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+ * Broadwell:
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+ * The INST_RETIRED.ALL period always needs to have lowest
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+ * 6bits cleared (BDM57). It shall not use a period smaller
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+ * than 100 (BDM11). We combine the two to enforce
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+ * a min-period of 128.
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+ */
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+static unsigned bdw_limit_period(struct perf_event *event, unsigned left)
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+{
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+ if ((event->hw.config & INTEL_ARCH_EVENT_MASK) ==
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+ X86_CONFIG(.event=0xc0, .umask=0x01)) {
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+ if (left < 128)
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+ left = 128;
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+ left &= ~0x3fu;
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+ }
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+ return left;
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+}
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+
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PMU_FORMAT_ATTR(event, "config:0-7" );
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PMU_FORMAT_ATTR(event, "config:0-7" );
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PMU_FORMAT_ATTR(umask, "config:8-15" );
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PMU_FORMAT_ATTR(umask, "config:8-15" );
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PMU_FORMAT_ATTR(edge, "config:18" );
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PMU_FORMAT_ATTR(edge, "config:18" );
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@@ -2712,6 +2730,7 @@ __init int intel_pmu_init(void)
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x86_pmu.hw_config = hsw_hw_config;
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x86_pmu.hw_config = hsw_hw_config;
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x86_pmu.get_event_constraints = hsw_get_event_constraints;
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x86_pmu.get_event_constraints = hsw_get_event_constraints;
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x86_pmu.cpu_events = hsw_events_attrs;
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x86_pmu.cpu_events = hsw_events_attrs;
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+ x86_pmu.limit_period = bdw_limit_period;
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pr_cont("Broadwell events, ");
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pr_cont("Broadwell events, ");
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break;
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break;
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