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@@ -565,16 +565,18 @@ static void dpaa_bps_free(struct dpaa_priv *priv)
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/* Use multiple WQs for FQ assignment:
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* - Tx Confirmation queues go to WQ1.
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- * - Rx Error and Tx Error queues go to WQ2 (giving them a better chance
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- * to be scheduled, in case there are many more FQs in WQ3).
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- * - Rx Default and Tx queues go to WQ3 (no differentiation between
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- * Rx and Tx traffic).
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+ * - Rx Error and Tx Error queues go to WQ5 (giving them a better chance
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+ * to be scheduled, in case there are many more FQs in WQ6).
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+ * - Rx Default goes to WQ6.
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+ * - Tx queues go to different WQs depending on their priority. Equal
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+ * chunks of NR_CPUS queues go to WQ6 (lowest priority), WQ2, WQ1 and
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+ * WQ0 (highest priority).
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* This ensures that Tx-confirmed buffers are timely released. In particular,
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* it avoids congestion on the Tx Confirm FQs, which can pile up PFDRs if they
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* are greatly outnumbered by other FQs in the system, while
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* dequeue scheduling is round-robin.
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*/
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-static inline void dpaa_assign_wq(struct dpaa_fq *fq)
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+static inline void dpaa_assign_wq(struct dpaa_fq *fq, int idx)
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{
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switch (fq->fq_type) {
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case FQ_TYPE_TX_CONFIRM:
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@@ -583,11 +585,33 @@ static inline void dpaa_assign_wq(struct dpaa_fq *fq)
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break;
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case FQ_TYPE_RX_ERROR:
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case FQ_TYPE_TX_ERROR:
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- fq->wq = 2;
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+ fq->wq = 5;
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break;
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case FQ_TYPE_RX_DEFAULT:
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+ fq->wq = 6;
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+ break;
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case FQ_TYPE_TX:
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- fq->wq = 3;
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+ switch (idx / DPAA_TC_TXQ_NUM) {
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+ case 0:
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+ /* Low priority (best effort) */
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+ fq->wq = 6;
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+ break;
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+ case 1:
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+ /* Medium priority */
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+ fq->wq = 2;
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+ break;
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+ case 2:
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+ /* High priority */
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+ fq->wq = 1;
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+ break;
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+ case 3:
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+ /* Very high priority */
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+ fq->wq = 0;
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+ break;
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+ default:
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+ WARN(1, "Too many TX FQs: more than %d!\n",
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+ DPAA_ETH_TXQ_NUM);
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+ }
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break;
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default:
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WARN(1, "Invalid FQ type %d for FQID %d!\n",
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@@ -615,7 +639,7 @@ static struct dpaa_fq *dpaa_fq_alloc(struct device *dev,
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}
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for (i = 0; i < count; i++)
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- dpaa_assign_wq(dpaa_fq + i);
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+ dpaa_assign_wq(dpaa_fq + i, i);
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return dpaa_fq;
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}
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@@ -2683,6 +2707,9 @@ static int dpaa_eth_probe(struct platform_device *pdev)
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memset(percpu_priv, 0, sizeof(*percpu_priv));
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}
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+ priv->num_tc = 1;
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+ netif_set_real_num_tx_queues(net_dev, priv->num_tc * DPAA_TC_TXQ_NUM);
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+
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/* Initialize NAPI */
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err = dpaa_napi_add(net_dev);
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if (err < 0)
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