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@@ -725,6 +725,31 @@ static void uvd_v6_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
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amdgpu_ring_write(ring, 0xE);
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amdgpu_ring_write(ring, 0xE);
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}
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}
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+static unsigned uvd_v6_0_ring_get_emit_ib_size(struct amdgpu_ring *ring)
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+{
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+ return
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+ 8; /* uvd_v6_0_ring_emit_ib */
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+}
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+
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+static unsigned uvd_v6_0_ring_get_dma_frame_size(struct amdgpu_ring *ring)
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+{
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+ return
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+ 2 + /* uvd_v6_0_ring_emit_hdp_flush */
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+ 2 + /* uvd_v6_0_ring_emit_hdp_invalidate */
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+ 10 + /* uvd_v6_0_ring_emit_pipeline_sync */
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+ 14; /* uvd_v6_0_ring_emit_fence x1 no user fence */
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+}
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+
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+static unsigned uvd_v6_0_ring_get_dma_frame_size_vm(struct amdgpu_ring *ring)
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+{
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+ return
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+ 2 + /* uvd_v6_0_ring_emit_hdp_flush */
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+ 2 + /* uvd_v6_0_ring_emit_hdp_invalidate */
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+ 10 + /* uvd_v6_0_ring_emit_pipeline_sync */
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+ 20 + /* uvd_v6_0_ring_emit_vm_flush */
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+ 14 + 14; /* uvd_v6_0_ring_emit_fence x2 vm fence */
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+}
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+
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static bool uvd_v6_0_is_idle(void *handle)
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static bool uvd_v6_0_is_idle(void *handle)
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{
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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@@ -1037,6 +1062,8 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
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.pad_ib = amdgpu_ring_generic_pad_ib,
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.pad_ib = amdgpu_ring_generic_pad_ib,
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.begin_use = amdgpu_uvd_ring_begin_use,
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.begin_use = amdgpu_uvd_ring_begin_use,
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.end_use = amdgpu_uvd_ring_end_use,
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.end_use = amdgpu_uvd_ring_end_use,
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+ .get_emit_ib_size = uvd_v6_0_ring_get_emit_ib_size,
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+ .get_dma_frame_size = uvd_v6_0_ring_get_dma_frame_size,
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};
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};
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static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
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static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
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@@ -1056,6 +1083,8 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
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.pad_ib = amdgpu_ring_generic_pad_ib,
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.pad_ib = amdgpu_ring_generic_pad_ib,
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.begin_use = amdgpu_uvd_ring_begin_use,
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.begin_use = amdgpu_uvd_ring_begin_use,
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.end_use = amdgpu_uvd_ring_end_use,
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.end_use = amdgpu_uvd_ring_end_use,
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+ .get_emit_ib_size = uvd_v6_0_ring_get_emit_ib_size,
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+ .get_dma_frame_size = uvd_v6_0_ring_get_dma_frame_size_vm,
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};
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};
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static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev)
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static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev)
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