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@@ -43,63 +43,65 @@ struct pmc_bit_map {
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};
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static const struct pmc_bit_map dev_map[] = {
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- {"0 - LPSS1_F0_DMA", BIT_LPSS1_F0_DMA},
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- {"1 - LPSS1_F1_PWM1", BIT_LPSS1_F1_PWM1},
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- {"2 - LPSS1_F2_PWM2", BIT_LPSS1_F2_PWM2},
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- {"3 - LPSS1_F3_HSUART1", BIT_LPSS1_F3_HSUART1},
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- {"4 - LPSS1_F4_HSUART2", BIT_LPSS1_F4_HSUART2},
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- {"5 - LPSS1_F5_SPI", BIT_LPSS1_F5_SPI},
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- {"6 - LPSS1_F6_Reserved", BIT_LPSS1_F6_XXX},
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- {"7 - LPSS1_F7_Reserved", BIT_LPSS1_F7_XXX},
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- {"8 - SCC_EMMC", BIT_SCC_EMMC},
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- {"9 - SCC_SDIO", BIT_SCC_SDIO},
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- {"10 - SCC_SDCARD", BIT_SCC_SDCARD},
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- {"11 - SCC_MIPI", BIT_SCC_MIPI},
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- {"12 - HDA", BIT_HDA},
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- {"13 - LPE", BIT_LPE},
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- {"14 - OTG", BIT_OTG},
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- {"15 - USH", BIT_USH},
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- {"16 - GBE", BIT_GBE},
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- {"17 - SATA", BIT_SATA},
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- {"18 - USB_EHCI", BIT_USB_EHCI},
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- {"19 - SEC", BIT_SEC},
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- {"20 - PCIE_PORT0", BIT_PCIE_PORT0},
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- {"21 - PCIE_PORT1", BIT_PCIE_PORT1},
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- {"22 - PCIE_PORT2", BIT_PCIE_PORT2},
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- {"23 - PCIE_PORT3", BIT_PCIE_PORT3},
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- {"24 - LPSS2_F0_DMA", BIT_LPSS2_F0_DMA},
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- {"25 - LPSS2_F1_I2C1", BIT_LPSS2_F1_I2C1},
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- {"26 - LPSS2_F2_I2C2", BIT_LPSS2_F2_I2C2},
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- {"27 - LPSS2_F3_I2C3", BIT_LPSS2_F3_I2C3},
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- {"28 - LPSS2_F3_I2C4", BIT_LPSS2_F4_I2C4},
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- {"29 - LPSS2_F5_I2C5", BIT_LPSS2_F5_I2C5},
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- {"30 - LPSS2_F6_I2C6", BIT_LPSS2_F6_I2C6},
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- {"31 - LPSS2_F7_I2C7", BIT_LPSS2_F7_I2C7},
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- {"32 - SMB", BIT_SMB},
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- {"33 - OTG_SS_PHY", BIT_OTG_SS_PHY},
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- {"34 - USH_SS_PHY", BIT_USH_SS_PHY},
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- {"35 - DFX", BIT_DFX},
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+ {"LPSS1_F0_DMA", BIT_LPSS1_F0_DMA},
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+ {"LPSS1_F1_PWM1", BIT_LPSS1_F1_PWM1},
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+ {"LPSS1_F2_PWM2", BIT_LPSS1_F2_PWM2},
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+ {"LPSS1_F3_HSUART1", BIT_LPSS1_F3_HSUART1},
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+ {"LPSS1_F4_HSUART2", BIT_LPSS1_F4_HSUART2},
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+ {"LPSS1_F5_SPI", BIT_LPSS1_F5_SPI},
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+ {"LPSS1_F6_Reserved", BIT_LPSS1_F6_XXX},
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+ {"LPSS1_F7_Reserved", BIT_LPSS1_F7_XXX},
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+ {"SCC_EMMC", BIT_SCC_EMMC},
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+ {"SCC_SDIO", BIT_SCC_SDIO},
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+ {"SCC_SDCARD", BIT_SCC_SDCARD},
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+ {"SCC_MIPI", BIT_SCC_MIPI},
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+ {"HDA", BIT_HDA},
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+ {"LPE", BIT_LPE},
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+ {"OTG", BIT_OTG},
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+ {"USH", BIT_USH},
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+ {"GBE", BIT_GBE},
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+ {"SATA", BIT_SATA},
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+ {"USB_EHCI", BIT_USB_EHCI},
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+ {"SEC", BIT_SEC},
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+ {"PCIE_PORT0", BIT_PCIE_PORT0},
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+ {"PCIE_PORT1", BIT_PCIE_PORT1},
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+ {"PCIE_PORT2", BIT_PCIE_PORT2},
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+ {"PCIE_PORT3", BIT_PCIE_PORT3},
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+ {"LPSS2_F0_DMA", BIT_LPSS2_F0_DMA},
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+ {"LPSS2_F1_I2C1", BIT_LPSS2_F1_I2C1},
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+ {"LPSS2_F2_I2C2", BIT_LPSS2_F2_I2C2},
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+ {"LPSS2_F3_I2C3", BIT_LPSS2_F3_I2C3},
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+ {"LPSS2_F3_I2C4", BIT_LPSS2_F4_I2C4},
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+ {"LPSS2_F5_I2C5", BIT_LPSS2_F5_I2C5},
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+ {"LPSS2_F6_I2C6", BIT_LPSS2_F6_I2C6},
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+ {"LPSS2_F7_I2C7", BIT_LPSS2_F7_I2C7},
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+ {"SMB", BIT_SMB},
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+ {"OTG_SS_PHY", BIT_OTG_SS_PHY},
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+ {"USH_SS_PHY", BIT_USH_SS_PHY},
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+ {"DFX", BIT_DFX},
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+ {},
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};
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static const struct pmc_bit_map pss_map[] = {
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- {"0 - GBE", PMC_PSS_BIT_GBE},
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- {"1 - SATA", PMC_PSS_BIT_SATA},
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- {"2 - HDA", PMC_PSS_BIT_HDA},
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- {"3 - SEC", PMC_PSS_BIT_SEC},
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- {"4 - PCIE", PMC_PSS_BIT_PCIE},
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- {"5 - LPSS", PMC_PSS_BIT_LPSS},
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- {"6 - LPE", PMC_PSS_BIT_LPE},
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- {"7 - DFX", PMC_PSS_BIT_DFX},
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- {"8 - USH_CTRL", PMC_PSS_BIT_USH_CTRL},
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- {"9 - USH_SUS", PMC_PSS_BIT_USH_SUS},
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- {"10 - USH_VCCS", PMC_PSS_BIT_USH_VCCS},
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- {"11 - USH_VCCA", PMC_PSS_BIT_USH_VCCA},
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- {"12 - OTG_CTRL", PMC_PSS_BIT_OTG_CTRL},
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- {"13 - OTG_VCCS", PMC_PSS_BIT_OTG_VCCS},
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- {"14 - OTG_VCCA_CLK", PMC_PSS_BIT_OTG_VCCA_CLK},
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- {"15 - OTG_VCCA", PMC_PSS_BIT_OTG_VCCA},
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- {"16 - USB", PMC_PSS_BIT_USB},
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- {"17 - USB_SUS", PMC_PSS_BIT_USB_SUS},
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+ {"GBE", PMC_PSS_BIT_GBE},
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+ {"SATA", PMC_PSS_BIT_SATA},
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+ {"HDA", PMC_PSS_BIT_HDA},
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+ {"SEC", PMC_PSS_BIT_SEC},
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+ {"PCIE", PMC_PSS_BIT_PCIE},
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+ {"LPSS", PMC_PSS_BIT_LPSS},
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+ {"LPE", PMC_PSS_BIT_LPE},
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+ {"DFX", PMC_PSS_BIT_DFX},
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+ {"USH_CTRL", PMC_PSS_BIT_USH_CTRL},
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+ {"USH_SUS", PMC_PSS_BIT_USH_SUS},
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+ {"USH_VCCS", PMC_PSS_BIT_USH_VCCS},
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+ {"USH_VCCA", PMC_PSS_BIT_USH_VCCA},
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+ {"OTG_CTRL", PMC_PSS_BIT_OTG_CTRL},
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+ {"OTG_VCCS", PMC_PSS_BIT_OTG_VCCS},
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+ {"OTG_VCCA_CLK", PMC_PSS_BIT_OTG_VCCA_CLK},
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+ {"OTG_VCCA", PMC_PSS_BIT_OTG_VCCA},
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+ {"USB", PMC_PSS_BIT_USB},
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+ {"USB_SUS", PMC_PSS_BIT_USB_SUS},
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+ {},
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};
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static inline u32 pmc_reg_read(struct pmc_dev *pmc, int reg_offset)
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@@ -172,16 +174,14 @@ static int pmc_dev_state_show(struct seq_file *s, void *unused)
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struct pmc_dev *pmc = s->private;
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u32 func_dis, func_dis_2, func_dis_index;
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u32 d3_sts_0, d3_sts_1, d3_sts_index;
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- int dev_num, dev_index, reg_index;
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+ int dev_index, reg_index;
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func_dis = pmc_reg_read(pmc, PMC_FUNC_DIS);
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func_dis_2 = pmc_reg_read(pmc, PMC_FUNC_DIS_2);
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d3_sts_0 = pmc_reg_read(pmc, PMC_D3_STS_0);
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d3_sts_1 = pmc_reg_read(pmc, PMC_D3_STS_1);
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- dev_num = ARRAY_SIZE(dev_map);
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-
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- for (dev_index = 0; dev_index < dev_num; dev_index++) {
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+ for (dev_index = 0; dev_map[dev_index].name; dev_index++) {
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reg_index = dev_index / PMC_REG_BIT_WIDTH;
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if (reg_index) {
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func_dis_index = func_dis_2;
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@@ -191,8 +191,8 @@ static int pmc_dev_state_show(struct seq_file *s, void *unused)
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d3_sts_index = d3_sts_0;
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}
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- seq_printf(s, "Dev: %-32s\tState: %s [%s]\n",
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- dev_map[dev_index].name,
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+ seq_printf(s, "Dev: %-2d - %-32s\tState: %s [%s]\n",
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+ dev_index, dev_map[dev_index].name,
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dev_map[dev_index].bit_mask & func_dis_index ?
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"Disabled" : "Enabled ",
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dev_map[dev_index].bit_mask & d3_sts_index ?
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@@ -219,9 +219,9 @@ static int pmc_pss_state_show(struct seq_file *s, void *unused)
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u32 pss = pmc_reg_read(pmc, PMC_PSS);
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int pss_index;
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- for (pss_index = 0; pss_index < ARRAY_SIZE(pss_map); pss_index++) {
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- seq_printf(s, "Island: %-32s\tState: %s\n",
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- pss_map[pss_index].name,
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+ for (pss_index = 0; pss_map[pss_index].name; pss_index++) {
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+ seq_printf(s, "Island: %-2d - %-32s\tState: %s\n",
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+ pss_index, pss_map[pss_index].name,
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pss_map[pss_index].bit_mask & pss ? "Off" : "On");
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}
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return 0;
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