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@@ -14,16 +14,16 @@
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* more details.
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*/
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-#include <linux/platform_device.h>
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-#include <linux/nvmem-provider.h>
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-#include <linux/slab.h>
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-#include <linux/regmap.h>
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+#include <linux/clk.h>
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+#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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-#include <linux/delay.h>
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+#include <linux/nvmem-provider.h>
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+#include <linux/slab.h>
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#include <linux/of.h>
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-#include <linux/clk.h>
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+#include <linux/platform_device.h>
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+#include <linux/regmap.h>
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#define EFUSE_A_SHIFT 6
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#define EFUSE_A_MASK 0x3ff
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@@ -35,10 +35,10 @@
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#define REG_EFUSE_CTRL 0x0000
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#define REG_EFUSE_DOUT 0x0004
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-struct rockchip_efuse_context {
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+struct rockchip_efuse_chip {
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struct device *dev;
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void __iomem *base;
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- struct clk *efuse_clk;
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+ struct clk *clk;
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};
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static int rockchip_efuse_write(void *context, const void *data, size_t count)
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@@ -52,34 +52,32 @@ static int rockchip_efuse_read(void *context,
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void *val, size_t val_size)
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{
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unsigned int offset = *(u32 *)reg;
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- struct rockchip_efuse_context *_context = context;
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- void __iomem *base = _context->base;
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- struct clk *clk = _context->efuse_clk;
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+ struct rockchip_efuse_chip *efuse = context;
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u8 *buf = val;
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int ret;
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- ret = clk_prepare_enable(clk);
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+ ret = clk_prepare_enable(efuse->clk);
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if (ret < 0) {
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- dev_err(_context->dev, "failed to prepare/enable efuse clk\n");
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+ dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
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return ret;
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}
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- writel(EFUSE_LOAD | EFUSE_PGENB, base + REG_EFUSE_CTRL);
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+ writel(EFUSE_LOAD | EFUSE_PGENB, efuse->base + REG_EFUSE_CTRL);
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udelay(1);
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while (val_size) {
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- writel(readl(base + REG_EFUSE_CTRL) &
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+ writel(readl(efuse->base + REG_EFUSE_CTRL) &
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(~(EFUSE_A_MASK << EFUSE_A_SHIFT)),
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- base + REG_EFUSE_CTRL);
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- writel(readl(base + REG_EFUSE_CTRL) |
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+ efuse->base + REG_EFUSE_CTRL);
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+ writel(readl(efuse->base + REG_EFUSE_CTRL) |
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((offset & EFUSE_A_MASK) << EFUSE_A_SHIFT),
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- base + REG_EFUSE_CTRL);
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+ efuse->base + REG_EFUSE_CTRL);
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udelay(1);
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- writel(readl(base + REG_EFUSE_CTRL) |
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- EFUSE_STROBE, base + REG_EFUSE_CTRL);
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+ writel(readl(efuse->base + REG_EFUSE_CTRL) |
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+ EFUSE_STROBE, efuse->base + REG_EFUSE_CTRL);
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udelay(1);
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- *buf++ = readb(base + REG_EFUSE_DOUT);
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- writel(readl(base + REG_EFUSE_CTRL) &
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- (~EFUSE_STROBE), base + REG_EFUSE_CTRL);
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+ *buf++ = readb(efuse->base + REG_EFUSE_DOUT);
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+ writel(readl(efuse->base + REG_EFUSE_CTRL) &
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+ (~EFUSE_STROBE), efuse->base + REG_EFUSE_CTRL);
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udelay(1);
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val_size -= 1;
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@@ -87,9 +85,9 @@ static int rockchip_efuse_read(void *context,
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}
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/* Switch to standby mode */
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- writel(EFUSE_PGENB | EFUSE_CSB, base + REG_EFUSE_CTRL);
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+ writel(EFUSE_PGENB | EFUSE_CSB, efuse->base + REG_EFUSE_CTRL);
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- clk_disable_unprepare(clk);
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+ clk_disable_unprepare(efuse->clk);
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return 0;
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}
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@@ -114,48 +112,44 @@ static struct nvmem_config econfig = {
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};
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static const struct of_device_id rockchip_efuse_match[] = {
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- { .compatible = "rockchip,rockchip-efuse",},
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+ { .compatible = "rockchip,rockchip-efuse", },
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{ /* sentinel */},
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};
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MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
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static int rockchip_efuse_probe(struct platform_device *pdev)
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{
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- struct device *dev = &pdev->dev;
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struct resource *res;
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struct nvmem_device *nvmem;
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struct regmap *regmap;
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- void __iomem *base;
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- struct clk *clk;
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- struct rockchip_efuse_context *context;
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+ struct rockchip_efuse_chip *efuse;
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- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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- base = devm_ioremap_resource(dev, res);
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- if (IS_ERR(base))
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- return PTR_ERR(base);
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+ efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
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+ GFP_KERNEL);
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+ if (!efuse)
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+ return -ENOMEM;
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- context = devm_kzalloc(dev, sizeof(struct rockchip_efuse_context),
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- GFP_KERNEL);
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- if (IS_ERR(context))
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- return PTR_ERR(context);
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ efuse->base = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(efuse->base))
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+ return PTR_ERR(efuse->base);
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- clk = devm_clk_get(dev, "pclk_efuse");
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- if (IS_ERR(clk))
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- return PTR_ERR(clk);
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+ efuse->clk = devm_clk_get(&pdev->dev, "pclk_efuse");
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+ if (IS_ERR(efuse->clk))
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+ return PTR_ERR(efuse->clk);
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- context->dev = dev;
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- context->base = base;
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- context->efuse_clk = clk;
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+ efuse->dev = &pdev->dev;
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rockchip_efuse_regmap_config.max_register = resource_size(res) - 1;
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- regmap = devm_regmap_init(dev, &rockchip_efuse_bus,
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- context, &rockchip_efuse_regmap_config);
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+ regmap = devm_regmap_init(efuse->dev, &rockchip_efuse_bus,
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+ efuse, &rockchip_efuse_regmap_config);
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if (IS_ERR(regmap)) {
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- dev_err(dev, "regmap init failed\n");
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+ dev_err(efuse->dev, "regmap init failed\n");
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return PTR_ERR(regmap);
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}
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- econfig.dev = dev;
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+
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+ econfig.dev = efuse->dev;
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nvmem = nvmem_register(&econfig);
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if (IS_ERR(nvmem))
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return PTR_ERR(nvmem);
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