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@@ -1696,9 +1696,9 @@ static ssize_t amdgpu_ttm_vram_read(struct file *f, char __user *buf,
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return result;
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return result;
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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- WREG32(mmMM_INDEX, ((uint32_t)*pos) | 0x80000000);
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- WREG32(mmMM_INDEX_HI, *pos >> 31);
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- value = RREG32(mmMM_DATA);
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+ WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)*pos) | 0x80000000);
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+ WREG32_NO_KIQ(mmMM_INDEX_HI, *pos >> 31);
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+ value = RREG32_NO_KIQ(mmMM_DATA);
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spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
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spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
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r = put_user(value, (uint32_t *)buf);
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r = put_user(value, (uint32_t *)buf);
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@@ -1739,9 +1739,9 @@ static ssize_t amdgpu_ttm_vram_write(struct file *f, const char __user *buf,
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return r;
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return r;
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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spin_lock_irqsave(&adev->mmio_idx_lock, flags);
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- WREG32(mmMM_INDEX, ((uint32_t)*pos) | 0x80000000);
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- WREG32(mmMM_INDEX_HI, *pos >> 31);
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- WREG32(mmMM_DATA, value);
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+ WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)*pos) | 0x80000000);
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+ WREG32_NO_KIQ(mmMM_INDEX_HI, *pos >> 31);
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+ WREG32_NO_KIQ(mmMM_DATA, value);
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spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
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spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
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result += 4;
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result += 4;
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