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@@ -82,6 +82,23 @@ void init_mmu(void)
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set_itlbcfg_register(0);
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set_dtlbcfg_register(0);
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#endif
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+ init_kio();
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+ local_flush_tlb_all();
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+
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+ /* Set rasid register to a known value. */
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+
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+ set_rasid_register(ASID_INSERT(ASID_USER_FIRST));
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+
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+ /* Set PTEVADDR special register to the start of the page
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+ * table, which is in kernel mappable space (ie. not
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+ * statically mapped). This register's value is undefined on
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+ * reset.
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+ */
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+ set_ptevaddr_register(XCHAL_PAGE_TABLE_VADDR);
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+}
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+
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+void init_kio(void)
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+{
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#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
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/*
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* Update the IO area mapping in case xtensa_kio_paddr has changed
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@@ -95,17 +112,4 @@ void init_mmu(void)
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write_itlb_entry(__pte(xtensa_kio_paddr + CA_BYPASS),
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XCHAL_KIO_BYPASS_VADDR + 6);
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#endif
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-
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- local_flush_tlb_all();
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-
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- /* Set rasid register to a known value. */
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-
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- set_rasid_register(ASID_INSERT(ASID_USER_FIRST));
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-
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- /* Set PTEVADDR special register to the start of the page
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- * table, which is in kernel mappable space (ie. not
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- * statically mapped). This register's value is undefined on
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- * reset.
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- */
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- set_ptevaddr_register(PGTABLE_START);
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}
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