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@@ -54,39 +54,6 @@ enum lcn_sense_type {
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B43_SENSE_VBAT,
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};
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-/* In theory it's PHY common function, move if needed */
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-/* brcms_b_switch_macfreq */
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-static void b43_phy_switch_macfreq(struct b43_wldev *dev, u8 spurmode)
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-{
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- if (dev->dev->chip_id == 43224 || dev->dev->chip_id == 43225) {
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- switch (spurmode) {
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- case 2: /* 126 Mhz */
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082);
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
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- break;
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- case 1: /* 123 Mhz */
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341);
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
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- break;
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- default: /* 120 Mhz */
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889);
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
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- break;
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- }
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- } else if (dev->phy.type == B43_PHYTYPE_LCN) {
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- switch (spurmode) {
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- case 1: /* 82 Mhz */
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0);
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
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- break;
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- default: /* 80 Mhz */
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD);
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- b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
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- break;
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- }
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- }
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-}
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-
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/**************************************************
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* Radio 2064.
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**************************************************/
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@@ -609,7 +576,7 @@ static void b43_phy_lcn_txrx_spur_avoidance_mode(struct b43_wldev *dev,
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b43_phy_write(dev, 0x93b, ((0 << 13) + 23));
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b43_phy_write(dev, 0x93c, ((0 << 13) + 1989));
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}
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- b43_phy_switch_macfreq(dev, enable);
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+ b43_mac_switch_freq(dev, enable);
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}
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/**************************************************
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