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@@ -1028,7 +1028,9 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
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saddr /= AMDGPU_GPU_PAGE_SIZE;
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saddr /= AMDGPU_GPU_PAGE_SIZE;
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eaddr /= AMDGPU_GPU_PAGE_SIZE;
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eaddr /= AMDGPU_GPU_PAGE_SIZE;
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+ spin_lock(&vm->it_lock);
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it = interval_tree_iter_first(&vm->va, saddr, eaddr - 1);
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it = interval_tree_iter_first(&vm->va, saddr, eaddr - 1);
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+ spin_unlock(&vm->it_lock);
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if (it) {
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if (it) {
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struct amdgpu_bo_va_mapping *tmp;
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struct amdgpu_bo_va_mapping *tmp;
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tmp = container_of(it, struct amdgpu_bo_va_mapping, it);
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tmp = container_of(it, struct amdgpu_bo_va_mapping, it);
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@@ -1055,7 +1057,9 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
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mapping->flags = flags;
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mapping->flags = flags;
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list_add(&mapping->list, &bo_va->invalids);
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list_add(&mapping->list, &bo_va->invalids);
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+ spin_lock(&vm->it_lock);
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interval_tree_insert(&mapping->it, &vm->va);
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interval_tree_insert(&mapping->it, &vm->va);
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+ spin_unlock(&vm->it_lock);
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trace_amdgpu_vm_bo_map(bo_va, mapping);
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trace_amdgpu_vm_bo_map(bo_va, mapping);
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/* Make sure the page tables are allocated */
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/* Make sure the page tables are allocated */
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@@ -1101,7 +1105,9 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
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error_free:
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error_free:
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list_del(&mapping->list);
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list_del(&mapping->list);
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+ spin_lock(&vm->it_lock);
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interval_tree_remove(&mapping->it, &vm->va);
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interval_tree_remove(&mapping->it, &vm->va);
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+ spin_unlock(&vm->it_lock);
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trace_amdgpu_vm_bo_unmap(bo_va, mapping);
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trace_amdgpu_vm_bo_unmap(bo_va, mapping);
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kfree(mapping);
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kfree(mapping);
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@@ -1151,7 +1157,9 @@ int amdgpu_vm_bo_unmap(struct amdgpu_device *adev,
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}
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}
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list_del(&mapping->list);
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list_del(&mapping->list);
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+ spin_lock(&vm->it_lock);
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interval_tree_remove(&mapping->it, &vm->va);
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interval_tree_remove(&mapping->it, &vm->va);
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+ spin_unlock(&vm->it_lock);
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trace_amdgpu_vm_bo_unmap(bo_va, mapping);
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trace_amdgpu_vm_bo_unmap(bo_va, mapping);
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if (valid)
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if (valid)
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@@ -1187,13 +1195,17 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
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list_for_each_entry_safe(mapping, next, &bo_va->valids, list) {
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list_for_each_entry_safe(mapping, next, &bo_va->valids, list) {
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list_del(&mapping->list);
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list_del(&mapping->list);
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+ spin_lock(&vm->it_lock);
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interval_tree_remove(&mapping->it, &vm->va);
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interval_tree_remove(&mapping->it, &vm->va);
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+ spin_unlock(&vm->it_lock);
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trace_amdgpu_vm_bo_unmap(bo_va, mapping);
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trace_amdgpu_vm_bo_unmap(bo_va, mapping);
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list_add(&mapping->list, &vm->freed);
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list_add(&mapping->list, &vm->freed);
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}
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}
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list_for_each_entry_safe(mapping, next, &bo_va->invalids, list) {
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list_for_each_entry_safe(mapping, next, &bo_va->invalids, list) {
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list_del(&mapping->list);
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list_del(&mapping->list);
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+ spin_lock(&vm->it_lock);
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interval_tree_remove(&mapping->it, &vm->va);
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interval_tree_remove(&mapping->it, &vm->va);
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+ spin_unlock(&vm->it_lock);
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kfree(mapping);
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kfree(mapping);
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}
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}
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@@ -1248,7 +1260,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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INIT_LIST_HEAD(&vm->invalidated);
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INIT_LIST_HEAD(&vm->invalidated);
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INIT_LIST_HEAD(&vm->cleared);
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INIT_LIST_HEAD(&vm->cleared);
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INIT_LIST_HEAD(&vm->freed);
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INIT_LIST_HEAD(&vm->freed);
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-
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+ spin_lock_init(&vm->it_lock);
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pd_size = amdgpu_vm_directory_size(adev);
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pd_size = amdgpu_vm_directory_size(adev);
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pd_entries = amdgpu_vm_num_pdes(adev);
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pd_entries = amdgpu_vm_num_pdes(adev);
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@@ -1312,7 +1324,6 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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amdgpu_bo_unref(&vm->page_directory);
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amdgpu_bo_unref(&vm->page_directory);
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fence_put(vm->page_directory_fence);
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fence_put(vm->page_directory_fence);
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-
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
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unsigned id = vm->ids[i].id;
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unsigned id = vm->ids[i].id;
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