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@@ -81,6 +81,15 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = {
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[PLL_OFF_TEST_CTL_U] = 0x20,
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[PLL_OFF_STATUS] = 0x24,
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},
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+ [CLK_ALPHA_PLL_TYPE_BRAMMO] = {
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+ [PLL_OFF_L_VAL] = 0x04,
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+ [PLL_OFF_ALPHA_VAL] = 0x08,
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+ [PLL_OFF_ALPHA_VAL_U] = 0x0c,
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+ [PLL_OFF_USER_CTL] = 0x10,
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+ [PLL_OFF_CONFIG_CTL] = 0x18,
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+ [PLL_OFF_TEST_CTL] = 0x1c,
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+ [PLL_OFF_STATUS] = 0x24,
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+ },
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};
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EXPORT_SYMBOL_GPL(clk_alpha_pll_regs);
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