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@@ -72,6 +72,14 @@
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#define SCLK_HEVC_CABAC 111
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#define SCLK_HEVC_CABAC 111
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#define SCLK_HEVC_CORE 112
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#define SCLK_HEVC_CORE 112
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#define SCLK_I2S0_OUT 113
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#define SCLK_I2S0_OUT 113
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+#define SCLK_SDMMC_DRV 114
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+#define SCLK_SDIO0_DRV 115
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+#define SCLK_SDIO1_DRV 116
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+#define SCLK_EMMC_DRV 117
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+#define SCLK_SDMMC_SAMPLE 118
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+#define SCLK_SDIO0_SAMPLE 119
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+#define SCLK_SDIO1_SAMPLE 120
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+#define SCLK_EMMC_SAMPLE 121
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#define DCLK_VOP0 190
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#define DCLK_VOP0 190
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#define DCLK_VOP1 191
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#define DCLK_VOP1 191
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