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@@ -138,16 +138,19 @@ static void sirfsoc_uart_stop_tx(struct uart_port *port)
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rd_regl(port, ureg->sirfsoc_int_en_reg) &
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~uint_en->sirfsoc_txfifo_empty_en);
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR,
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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uint_en->sirfsoc_txfifo_empty_en);
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}
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} else {
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+ if (sirfport->uart_reg->uart_type == SIRF_USP_UART)
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+ wr_regl(port, ureg->sirfsoc_tx_rx_en, rd_regl(port,
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+ ureg->sirfsoc_tx_rx_en) & ~SIRFUART_TX_EN);
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if (!sirfport->is_atlas7)
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wr_regl(port, ureg->sirfsoc_int_en_reg,
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rd_regl(port, ureg->sirfsoc_int_en_reg) &
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~uint_en->sirfsoc_txfifo_empty_en);
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR,
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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uint_en->sirfsoc_txfifo_empty_en);
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}
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}
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@@ -178,7 +181,7 @@ static void sirfsoc_uart_tx_with_dma(struct sirfsoc_uart_port *sirfport)
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rd_regl(port, ureg->sirfsoc_int_en_reg)&
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~(uint_en->sirfsoc_txfifo_empty_en));
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR,
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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uint_en->sirfsoc_txfifo_empty_en);
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/*
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* DMA requires buffer address and buffer length are both aligned with
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@@ -246,6 +249,9 @@ static void sirfsoc_uart_start_tx(struct uart_port *port)
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if (sirfport->tx_dma_chan)
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sirfsoc_uart_tx_with_dma(sirfport);
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else {
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+ if (sirfport->uart_reg->uart_type == SIRF_USP_UART)
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+ wr_regl(port, ureg->sirfsoc_tx_rx_en, rd_regl(port,
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+ ureg->sirfsoc_tx_rx_en) | SIRFUART_TX_EN);
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sirfsoc_uart_pio_tx_chars(sirfport, port->fifosize);
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wr_regl(port, ureg->sirfsoc_tx_fifo_op, SIRFUART_FIFO_START);
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if (!sirfport->is_atlas7)
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@@ -269,21 +275,25 @@ static void sirfsoc_uart_stop_rx(struct uart_port *port)
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if (!sirfport->is_atlas7)
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wr_regl(port, ureg->sirfsoc_int_en_reg,
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rd_regl(port, ureg->sirfsoc_int_en_reg) &
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- ~(SIRFUART_RX_DMA_INT_EN(port, uint_en) |
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+ ~(SIRFUART_RX_DMA_INT_EN(uint_en,
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+ sirfport->uart_reg->uart_type) |
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uint_en->sirfsoc_rx_done_en));
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR,
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- SIRFUART_RX_DMA_INT_EN(port, uint_en)|
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- uint_en->sirfsoc_rx_done_en);
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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+ SIRFUART_RX_DMA_INT_EN(uint_en,
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+ sirfport->uart_reg->uart_type)|
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+ uint_en->sirfsoc_rx_done_en);
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dmaengine_terminate_all(sirfport->rx_dma_chan);
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} else {
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if (!sirfport->is_atlas7)
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wr_regl(port, ureg->sirfsoc_int_en_reg,
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rd_regl(port, ureg->sirfsoc_int_en_reg)&
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- ~(SIRFUART_RX_IO_INT_EN(port, uint_en)));
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+ ~(SIRFUART_RX_IO_INT_EN(uint_en,
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+ sirfport->uart_reg->uart_type)));
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR,
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- SIRFUART_RX_IO_INT_EN(port, uint_en));
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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+ SIRFUART_RX_IO_INT_EN(uint_en,
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+ sirfport->uart_reg->uart_type));
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}
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}
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@@ -304,7 +314,7 @@ static void sirfsoc_uart_disable_ms(struct uart_port *port)
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rd_regl(port, ureg->sirfsoc_int_en_reg)&
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~uint_en->sirfsoc_cts_en);
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR,
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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uint_en->sirfsoc_cts_en);
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} else
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disable_irq(gpio_to_irq(sirfport->cts_gpio));
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@@ -455,7 +465,7 @@ static void sirfsoc_rx_submit_one_dma_desc(struct uart_port *port, int index)
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dmaengine_prep_slave_single(sirfport->rx_dma_chan,
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sirfport->rx_dma_items[index].dma_addr, SIRFSOC_RX_DMA_BUF_SIZE,
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DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT);
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- if (!sirfport->rx_dma_items[index].desc) {
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+ if (IS_ERR_OR_NULL(sirfport->rx_dma_items[index].desc)) {
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dev_err(port->dev, "DMA slave single fail\n");
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return;
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}
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@@ -475,12 +485,13 @@ static void sirfsoc_rx_tmo_process_tl(unsigned long param)
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struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en;
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struct sirfsoc_int_status *uint_st = &sirfport->uart_reg->uart_int_st;
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unsigned int count;
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- unsigned long flags;
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struct dma_tx_state tx_state;
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+ unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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while (DMA_COMPLETE == dmaengine_tx_status(sirfport->rx_dma_chan,
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- sirfport->rx_dma_items[sirfport->rx_completed].cookie, &tx_state)) {
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+ sirfport->rx_dma_items[sirfport->rx_completed].cookie,
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+ &tx_state)) {
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sirfsoc_uart_insert_rx_buf_to_tty(sirfport,
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SIRFSOC_RX_DMA_BUF_SIZE);
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sirfport->rx_completed++;
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@@ -504,7 +515,7 @@ static void sirfsoc_rx_tmo_process_tl(unsigned long param)
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rd_regl(port, ureg->sirfsoc_int_en_reg) &
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~(uint_en->sirfsoc_rx_done_en));
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR,
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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uint_en->sirfsoc_rx_done_en);
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sirfsoc_uart_start_next_rx_dma(port);
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} else {
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@@ -538,7 +549,7 @@ static void sirfsoc_uart_handle_rx_tmo(struct sirfsoc_uart_port *sirfport)
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rd_regl(port, ureg->sirfsoc_int_en_reg) &
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~(uint_en->sirfsoc_rx_timeout_en));
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR,
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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uint_en->sirfsoc_rx_timeout_en);
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tasklet_schedule(&sirfport->rx_tmo_process_tasklet);
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}
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@@ -558,7 +569,7 @@ static void sirfsoc_uart_handle_rx_done(struct sirfsoc_uart_port *sirfport)
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rd_regl(port, ureg->sirfsoc_int_en_reg) &
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~(uint_en->sirfsoc_rx_done_en));
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR,
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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uint_en->sirfsoc_rx_done_en);
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wr_regl(port, ureg->sirfsoc_int_st_reg,
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uint_st->sirfsoc_rx_timeout);
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@@ -583,7 +594,8 @@ static irqreturn_t sirfsoc_uart_isr(int irq, void *dev_id)
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intr_status = rd_regl(port, ureg->sirfsoc_int_st_reg);
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wr_regl(port, ureg->sirfsoc_int_st_reg, intr_status);
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intr_status &= rd_regl(port, ureg->sirfsoc_int_en_reg);
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- if (unlikely(intr_status & (SIRFUART_ERR_INT_STAT(port, uint_st)))) {
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+ if (unlikely(intr_status & (SIRFUART_ERR_INT_STAT(uint_st,
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+ sirfport->uart_reg->uart_type)))) {
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if (intr_status & uint_st->sirfsoc_rxd_brk) {
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port->icount.brk++;
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if (uart_handle_break(port))
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@@ -622,9 +634,50 @@ recv_char:
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sirfsoc_uart_handle_rx_tmo(sirfport);
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if (intr_status & uint_st->sirfsoc_rx_done)
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sirfsoc_uart_handle_rx_done(sirfport);
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- } else {
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- if (intr_status & SIRFUART_RX_IO_INT_ST(uint_st))
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+ } else if (intr_status & SIRFUART_RX_IO_INT_ST(uint_st)) {
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+ /*
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+ * chip will trigger continuous RX_TIMEOUT interrupt
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+ * in RXFIFO empty and not trigger if RXFIFO recevice
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+ * data in limit time, original method use RX_TIMEOUT
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+ * will trigger lots of useless interrupt in RXFIFO
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+ * empty.RXFIFO received one byte will trigger RX_DONE
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+ * interrupt.use RX_DONE to wait for data received
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+ * into RXFIFO, use RX_THD/RX_FULL for lots data receive
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+ * and use RX_TIMEOUT for the last left data.
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+ */
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+ if (intr_status & uint_st->sirfsoc_rx_done) {
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+ if (!sirfport->is_atlas7) {
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+ wr_regl(port, ureg->sirfsoc_int_en_reg,
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+ rd_regl(port, ureg->sirfsoc_int_en_reg)
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+ & ~(uint_en->sirfsoc_rx_done_en));
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+ wr_regl(port, ureg->sirfsoc_int_en_reg,
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+ rd_regl(port, ureg->sirfsoc_int_en_reg)
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+ | (uint_en->sirfsoc_rx_timeout_en));
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+ } else {
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg,
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+ uint_en->sirfsoc_rx_done_en);
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+ wr_regl(port, ureg->sirfsoc_int_en_reg,
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+ uint_en->sirfsoc_rx_timeout_en);
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+ }
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+ } else {
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+ if (intr_status & uint_st->sirfsoc_rx_timeout) {
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+ if (!sirfport->is_atlas7) {
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+ wr_regl(port, ureg->sirfsoc_int_en_reg,
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+ rd_regl(port, ureg->sirfsoc_int_en_reg)
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+ & ~(uint_en->sirfsoc_rx_timeout_en));
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+ wr_regl(port, ureg->sirfsoc_int_en_reg,
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+ rd_regl(port, ureg->sirfsoc_int_en_reg)
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+ | (uint_en->sirfsoc_rx_done_en));
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+ } else {
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+ wr_regl(port,
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+ ureg->sirfsoc_int_en_clr_reg,
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+ uint_en->sirfsoc_rx_timeout_en);
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+ wr_regl(port, ureg->sirfsoc_int_en_reg,
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+ uint_en->sirfsoc_rx_done_en);
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+ }
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+ }
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sirfsoc_uart_pio_rx_chars(port, port->fifosize);
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+ }
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}
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spin_unlock(&port->lock);
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tty_flip_buffer_push(&state->port);
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@@ -657,11 +710,12 @@ static void sirfsoc_uart_rx_dma_complete_tl(unsigned long param)
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struct uart_port *port = &sirfport->port;
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struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg;
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struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en;
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- unsigned long flags;
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struct dma_tx_state tx_state;
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+ unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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while (DMA_COMPLETE == dmaengine_tx_status(sirfport->rx_dma_chan,
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- sirfport->rx_dma_items[sirfport->rx_completed].cookie, &tx_state)) {
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+ sirfport->rx_dma_items[sirfport->rx_completed].cookie,
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+ &tx_state)) {
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sirfsoc_uart_insert_rx_buf_to_tty(sirfport,
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SIRFSOC_RX_DMA_BUF_SIZE);
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if (rd_regl(port, ureg->sirfsoc_int_en_reg) &
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@@ -705,10 +759,12 @@ static void sirfsoc_uart_start_next_rx_dma(struct uart_port *port)
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if (!sirfport->is_atlas7)
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wr_regl(port, ureg->sirfsoc_int_en_reg,
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rd_regl(port, ureg->sirfsoc_int_en_reg) |
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- SIRFUART_RX_DMA_INT_EN(port, uint_en));
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+ SIRFUART_RX_DMA_INT_EN(uint_en,
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+ sirfport->uart_reg->uart_type));
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else
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wr_regl(port, ureg->sirfsoc_int_en_reg,
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- SIRFUART_RX_DMA_INT_EN(port, uint_en));
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+ SIRFUART_RX_DMA_INT_EN(uint_en,
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+ sirfport->uart_reg->uart_type));
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}
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static void sirfsoc_uart_start_rx(struct uart_port *port)
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@@ -727,10 +783,12 @@ static void sirfsoc_uart_start_rx(struct uart_port *port)
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if (!sirfport->is_atlas7)
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wr_regl(port, ureg->sirfsoc_int_en_reg,
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rd_regl(port, ureg->sirfsoc_int_en_reg) |
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- SIRFUART_RX_IO_INT_EN(port, uint_en));
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+ SIRFUART_RX_IO_INT_EN(uint_en,
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+ sirfport->uart_reg->uart_type));
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else
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wr_regl(port, ureg->sirfsoc_int_en_reg,
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- SIRFUART_RX_IO_INT_EN(port, uint_en));
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+ SIRFUART_RX_IO_INT_EN(uint_en,
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+ sirfport->uart_reg->uart_type));
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}
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}
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@@ -930,7 +988,7 @@ static void sirfsoc_uart_set_termios(struct uart_port *port,
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wr_regl(port, ureg->sirfsoc_tx_fifo_op,
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(txfifo_op_reg & ~SIRFUART_FIFO_START));
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if (sirfport->uart_reg->uart_type == SIRF_REAL_UART) {
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- config_reg |= SIRFUART_RECV_TIMEOUT(port, rx_time_out);
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+ config_reg |= SIRFUART_UART_RECV_TIMEOUT(rx_time_out);
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wr_regl(port, ureg->sirfsoc_line_ctrl, config_reg);
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} else {
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/*tx frame ctrl*/
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@@ -953,7 +1011,7 @@ static void sirfsoc_uart_set_termios(struct uart_port *port,
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wr_regl(port, ureg->sirfsoc_rx_frame_ctrl, len_val);
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/*async param*/
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wr_regl(port, ureg->sirfsoc_async_param_reg,
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- (SIRFUART_RECV_TIMEOUT(port, rx_time_out)) |
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+ (SIRFUART_USP_RECV_TIMEOUT(rx_time_out)) |
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(sample_div_reg & SIRFSOC_USP_ASYNC_DIV2_MASK) <<
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SIRFSOC_USP_ASYNC_DIV2_OFFSET);
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}
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@@ -1071,7 +1129,7 @@ static void sirfsoc_uart_shutdown(struct uart_port *port)
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if (!sirfport->is_atlas7)
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wr_regl(port, ureg->sirfsoc_int_en_reg, 0);
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else
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- wr_regl(port, SIRFUART_INT_EN_CLR, ~0UL);
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+ wr_regl(port, ureg->sirfsoc_int_en_clr_reg, ~0UL);
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free_irq(port->irq, sirfport);
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if (sirfport->ms_enabled)
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@@ -1217,10 +1275,11 @@ static struct uart_driver sirfsoc_uart_drv = {
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#endif
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};
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-static const struct of_device_id sirfsoc_uart_ids[] = {
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+static struct of_device_id sirfsoc_uart_ids[] = {
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{ .compatible = "sirf,prima2-uart", .data = &sirfsoc_uart,},
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{ .compatible = "sirf,atlas7-uart", .data = &sirfsoc_uart},
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{ .compatible = "sirf,prima2-usp-uart", .data = &sirfsoc_usp},
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+ { .compatible = "sirf,atlas7-usp-uart", .data = &sirfsoc_usp},
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{}
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};
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MODULE_DEVICE_TABLE(of, sirfsoc_uart_ids);
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@@ -1257,9 +1316,12 @@ static int sirfsoc_uart_probe(struct platform_device *pdev)
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sirfport->hw_flow_ctrl = of_property_read_bool(pdev->dev.of_node,
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"sirf,uart-has-rtscts");
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- if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart"))
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+ if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart") ||
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+ of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-uart"))
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sirfport->uart_reg->uart_type = SIRF_REAL_UART;
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- if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) {
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+ if (of_device_is_compatible(pdev->dev.of_node,
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+ "sirf,prima2-usp-uart") || of_device_is_compatible(
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+ pdev->dev.of_node, "sirf,atlas7-usp-uart")) {
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sirfport->uart_reg->uart_type = SIRF_USP_UART;
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if (!sirfport->hw_flow_ctrl)
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goto usp_no_flow_control;
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@@ -1297,7 +1359,8 @@ static int sirfsoc_uart_probe(struct platform_device *pdev)
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gpio_direction_output(sirfport->rts_gpio, 1);
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}
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usp_no_flow_control:
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- if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-uart"))
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+ if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-uart") ||
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+ of_device_is_compatible(pdev->dev.of_node, "sirf,atlas7-usp-uart"))
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sirfport->is_atlas7 = true;
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if (of_property_read_u32(pdev->dev.of_node,
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