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@@ -1312,25 +1312,23 @@ static void st_gpio_irq_unmask(struct irq_data *d)
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writel(BIT(d->hwirq), bank->base + REG_PIO_SET_PMASK);
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writel(BIT(d->hwirq), bank->base + REG_PIO_SET_PMASK);
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}
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}
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-static unsigned int st_gpio_irq_startup(struct irq_data *d)
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+static int st_gpio_irq_reqres(struct irq_data *d)
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{
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{
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struct st_gpio_bank *bank = irq_data_get_irq_chip_data(d);
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struct st_gpio_bank *bank = irq_data_get_irq_chip_data(d);
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- if (gpio_lock_as_irq(&bank->gpio_chip, d->hwirq))
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+ if (gpio_lock_as_irq(&bank->gpio_chip, d->hwirq)) {
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dev_err(bank->gpio_chip.dev,
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dev_err(bank->gpio_chip.dev,
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"unable to lock HW IRQ %lu for IRQ\n",
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"unable to lock HW IRQ %lu for IRQ\n",
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d->hwirq);
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d->hwirq);
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-
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- st_gpio_irq_unmask(d);
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-
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+ return -EINVAL;
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+ }
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return 0;
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return 0;
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}
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}
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-static void st_gpio_irq_shutdown(struct irq_data *d)
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+static void st_gpio_irq_relres(struct irq_data *d)
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{
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{
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struct st_gpio_bank *bank = irq_data_get_irq_chip_data(d);
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struct st_gpio_bank *bank = irq_data_get_irq_chip_data(d);
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- st_gpio_irq_mask(d);
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gpio_unlock_as_irq(&bank->gpio_chip, d->hwirq);
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gpio_unlock_as_irq(&bank->gpio_chip, d->hwirq);
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}
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}
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@@ -1491,8 +1489,8 @@ static struct irq_chip st_gpio_irqchip = {
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.irq_mask = st_gpio_irq_mask,
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.irq_mask = st_gpio_irq_mask,
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.irq_unmask = st_gpio_irq_unmask,
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.irq_unmask = st_gpio_irq_unmask,
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.irq_set_type = st_gpio_irq_set_type,
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.irq_set_type = st_gpio_irq_set_type,
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- .irq_startup = st_gpio_irq_startup,
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- .irq_shutdown = st_gpio_irq_shutdown,
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+ .irq_request_resources = st_gpio_irq_reqres,
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+ .irq_release_resources = st_gpio_irq_relres,
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};
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};
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static int st_gpio_irq_domain_map(struct irq_domain *h,
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static int st_gpio_irq_domain_map(struct irq_domain *h,
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