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@@ -398,8 +398,10 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
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enum pipe *pipe)
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{
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struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
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+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
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+ struct drm_device *dev = encoder->base.dev;
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enum intel_display_power_domain power_domain;
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- u32 port_ctl, func;
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+ u32 dpi_enabled, func;
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enum port port;
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DRM_DEBUG_KMS("\n");
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@@ -409,13 +411,23 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
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return false;
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/* XXX: this only works for one DSI output */
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- for_each_dsi_port(port, (1 << PORT_A) | (1 << PORT_C)) {
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- port_ctl = I915_READ(MIPI_PORT_CTRL(port));
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+ for_each_dsi_port(port, intel_dsi->ports) {
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func = I915_READ(MIPI_DSI_FUNC_PRG(port));
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+ dpi_enabled = I915_READ(MIPI_PORT_CTRL(port)) &
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+ DPI_ENABLE;
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+
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+ /* Due to some hardware limitations on BYT, MIPI Port C DPI
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+ * Enable bit does not get set. To check whether DSI Port C
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+ * was enabled in BIOS, check the Pipe B enable bit
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+ */
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+ if (IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) &&
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+ (port == PORT_C))
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+ dpi_enabled = I915_READ(PIPECONF(PIPE_B)) &
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+ PIPECONF_ENABLE;
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- if ((port_ctl & DPI_ENABLE) || (func & CMD_MODE_DATA_WIDTH_MASK)) {
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+ if (dpi_enabled || (func & CMD_MODE_DATA_WIDTH_MASK)) {
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if (I915_READ(MIPI_DEVICE_READY(port)) & DEVICE_READY) {
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- *pipe = port == PORT_A ? PIPE_A : PIPE_C;
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+ *pipe = port == PORT_A ? PIPE_A : PIPE_B;
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return true;
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}
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}
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