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@@ -1288,34 +1288,21 @@ m64_failed:
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return -EBUSY;
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}
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+static long pnv_pci_ioda2_unset_window(struct iommu_table_group *table_group,
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+ int num);
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+static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
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+
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static void pnv_pci_ioda2_release_dma_pe(struct pci_dev *dev, struct pnv_ioda_pe *pe)
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{
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- struct pci_bus *bus;
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- struct pci_controller *hose;
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- struct pnv_phb *phb;
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struct iommu_table *tbl;
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- unsigned long addr;
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int64_t rc;
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- bus = dev->bus;
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- hose = pci_bus_to_host(bus);
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- phb = hose->private_data;
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tbl = pe->table_group.tables[0];
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- addr = tbl->it_base;
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-
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- opal_pci_map_pe_dma_window(phb->opal_id, pe->pe_number,
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- pe->pe_number << 1, 1, __pa(addr),
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- 0, 0x1000);
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-
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- rc = opal_pci_map_pe_dma_window_real(pe->phb->opal_id,
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- pe->pe_number,
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- (pe->pe_number << 1) + 1,
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- pe->tce_bypass_base,
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- 0);
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+ rc = pnv_pci_ioda2_unset_window(&pe->table_group, 0);
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if (rc)
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pe_warn(pe, "OPAL error %ld release DMA window\n", rc);
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- pnv_pci_unlink_table_and_group(tbl, &pe->table_group);
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+ pnv_pci_ioda2_set_bypass(pe, false);
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if (pe->table_group.group) {
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iommu_group_put(pe->table_group.group);
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BUG_ON(pe->table_group.group);
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