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@@ -25,12 +25,30 @@
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static struct irq_chip jcore_aic;
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+/*
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+ * The J-Core AIC1 and AIC2 are cpu-local interrupt controllers and do
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+ * not distinguish or use distinct irq number ranges for per-cpu event
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+ * interrupts (timer, IPI). Since information to determine whether a
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+ * particular irq number should be treated as per-cpu is not available
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+ * at mapping time, we use a wrapper handler function which chooses
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+ * the right handler at runtime based on whether IRQF_PERCPU was used
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+ * when requesting the irq.
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+ */
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+
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+static void handle_jcore_irq(struct irq_desc *desc)
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+{
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+ if (irqd_is_per_cpu(irq_desc_get_irq_data(desc)))
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+ handle_percpu_irq(desc);
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+ else
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+ handle_simple_irq(desc);
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+}
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+
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static int jcore_aic_irqdomain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct irq_chip *aic = d->host_data;
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- irq_set_chip_and_handler(irq, aic, handle_simple_irq);
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+ irq_set_chip_and_handler(irq, aic, handle_jcore_irq);
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return 0;
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}
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