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@@ -14510,12 +14510,33 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state)
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static void intel_atomic_commit_work(struct work_struct *work)
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{
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- struct drm_atomic_state *state = container_of(work,
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- struct drm_atomic_state,
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- commit_work);
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+ struct drm_atomic_state *state =
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+ container_of(work, struct drm_atomic_state, commit_work);
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+
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intel_atomic_commit_tail(state);
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}
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+static int __i915_sw_fence_call
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+intel_atomic_commit_ready(struct i915_sw_fence *fence,
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+ enum i915_sw_fence_notify notify)
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+{
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+ struct intel_atomic_state *state =
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+ container_of(fence, struct intel_atomic_state, commit_ready);
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+
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+ switch (notify) {
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+ case FENCE_COMPLETE:
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+ if (state->base.commit_work.func)
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+ queue_work(system_unbound_wq, &state->base.commit_work);
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+ break;
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+
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+ case FENCE_FREE:
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+ drm_atomic_state_put(&state->base);
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+ break;
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+ }
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+
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+ return NOTIFY_DONE;
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+}
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+
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static void intel_atomic_track_fbs(struct drm_atomic_state *state)
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{
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struct drm_plane_state *old_plane_state;
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@@ -14561,11 +14582,14 @@ static int intel_atomic_commit(struct drm_device *dev,
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if (ret)
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return ret;
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- INIT_WORK(&state->commit_work, intel_atomic_commit_work);
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+ drm_atomic_state_get(state);
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+ i915_sw_fence_init(&intel_state->commit_ready,
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+ intel_atomic_commit_ready);
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ret = intel_atomic_prepare_commit(dev, state);
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if (ret) {
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DRM_DEBUG_ATOMIC("Preparing state failed with %i\n", ret);
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+ i915_sw_fence_commit(&intel_state->commit_ready);
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return ret;
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}
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@@ -14576,10 +14600,14 @@ static int intel_atomic_commit(struct drm_device *dev,
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intel_atomic_track_fbs(state);
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drm_atomic_state_get(state);
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- if (nonblock)
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- queue_work(system_unbound_wq, &state->commit_work);
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- else
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+ INIT_WORK(&state->commit_work,
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+ nonblock ? intel_atomic_commit_work : NULL);
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+
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+ i915_sw_fence_commit(&intel_state->commit_ready);
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+ if (!nonblock) {
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+ i915_sw_fence_wait(&intel_state->commit_ready);
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intel_atomic_commit_tail(state);
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+ }
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return 0;
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}
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@@ -14691,20 +14719,22 @@ int
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intel_prepare_plane_fb(struct drm_plane *plane,
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struct drm_plane_state *new_state)
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{
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+ struct intel_atomic_state *intel_state =
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+ to_intel_atomic_state(new_state->state);
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struct drm_device *dev = plane->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct drm_framebuffer *fb = new_state->fb;
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struct drm_i915_gem_object *obj = intel_fb_obj(fb);
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struct drm_i915_gem_object *old_obj = intel_fb_obj(plane->state->fb);
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- long lret;
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- int ret = 0;
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+ int ret;
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if (!obj && !old_obj)
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return 0;
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if (old_obj) {
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struct drm_crtc_state *crtc_state =
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- drm_atomic_get_existing_crtc_state(new_state->state, plane->state->crtc);
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+ drm_atomic_get_existing_crtc_state(new_state->state,
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+ plane->state->crtc);
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/* Big Hammer, we also need to ensure that any pending
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* MI_WAIT_FOR_EVENT inside a user batch buffer on the
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@@ -14717,31 +14747,36 @@ intel_prepare_plane_fb(struct drm_plane *plane,
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* This should only fail upon a hung GPU, in which case we
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* can safely continue.
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*/
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- if (needs_modeset(crtc_state))
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- ret = i915_gem_object_wait(old_obj,
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- I915_WAIT_INTERRUPTIBLE |
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- I915_WAIT_LOCKED,
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- MAX_SCHEDULE_TIMEOUT,
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- NULL);
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- if (ret) {
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- /* GPU hangs should have been swallowed by the wait */
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- WARN_ON(ret == -EIO);
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- return ret;
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+ if (needs_modeset(crtc_state)) {
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+ ret = i915_sw_fence_await_reservation(&intel_state->commit_ready,
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+ old_obj->resv, NULL,
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+ false, 0,
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+ GFP_KERNEL);
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+ if (ret < 0)
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+ return ret;
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}
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}
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+ if (new_state->fence) { /* explicit fencing */
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+ ret = i915_sw_fence_await_dma_fence(&intel_state->commit_ready,
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+ new_state->fence,
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+ I915_FENCE_TIMEOUT,
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+ GFP_KERNEL);
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+ if (ret < 0)
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+ return ret;
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+ }
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+
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if (!obj)
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return 0;
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- /* For framebuffer backed by dmabuf, wait for fence */
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- lret = i915_gem_object_wait(obj,
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- I915_WAIT_INTERRUPTIBLE | I915_WAIT_LOCKED,
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- MAX_SCHEDULE_TIMEOUT,
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- NULL);
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- if (lret == -ERESTARTSYS)
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- return lret;
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-
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- WARN(lret < 0, "waiting returns %li\n", lret);
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+ if (!new_state->fence) { /* implicit fencing */
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+ ret = i915_sw_fence_await_reservation(&intel_state->commit_ready,
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+ obj->resv, NULL,
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+ false, I915_FENCE_TIMEOUT,
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+ GFP_KERNEL);
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+ if (ret < 0)
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+ return ret;
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+ }
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if (plane->type == DRM_PLANE_TYPE_CURSOR &&
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INTEL_INFO(dev)->cursor_needs_physical) {
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