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@@ -893,14 +893,11 @@ static int trigger_sbr(struct hfi1_devdata *dd)
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}
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/*
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- * A secondary bus reset (SBR) issues a hot reset to our device.
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- * The following routine does a 1s wait after the reset is dropped
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- * per PCI Trhfa (recovery time). PCIe 3.0 section 6.6.1 -
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- * Conventional Reset, paragraph 3, line 35 also says that a 1s
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- * delay after a reset is required. Per spec requirements,
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- * the link is either working or not after that point.
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+ * This is an end around to do an SBR during probe time. A new API needs
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+ * to be implemented to have cleaner interface but this fixes the
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+ * current brokenness
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*/
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- return pci_reset_bus(dev);
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+ return pci_bridge_secondary_bus_reset(dev->bus->self);
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}
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/*
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