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@@ -324,8 +324,10 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
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* @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips
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* @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips
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* @irq_cpu_online: configure an interrupt source for a secondary CPU
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* @irq_cpu_online: configure an interrupt source for a secondary CPU
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* @irq_cpu_offline: un-configure an interrupt source for a secondary CPU
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* @irq_cpu_offline: un-configure an interrupt source for a secondary CPU
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- * @irq_suspend: function called from core code on suspend once per chip
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- * @irq_resume: function called from core code on resume once per chip
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+ * @irq_suspend: function called from core code on suspend once per
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+ * chip, when one or more interrupts are installed
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+ * @irq_resume: function called from core code on resume once per chip,
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+ * when one ore more interrupts are installed
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* @irq_pm_shutdown: function called from core code on shutdown once per chip
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* @irq_pm_shutdown: function called from core code on shutdown once per chip
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* @irq_calc_mask: Optional function to set irq_data.mask for special cases
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* @irq_calc_mask: Optional function to set irq_data.mask for special cases
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* @irq_print_chip: optional to print special chip info in show_interrupts
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* @irq_print_chip: optional to print special chip info in show_interrupts
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@@ -760,6 +762,12 @@ struct irq_chip_type {
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* @reg_base: Register base address (virtual)
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* @reg_base: Register base address (virtual)
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* @reg_readl: Alternate I/O accessor (defaults to readl if NULL)
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* @reg_readl: Alternate I/O accessor (defaults to readl if NULL)
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* @reg_writel: Alternate I/O accessor (defaults to writel if NULL)
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* @reg_writel: Alternate I/O accessor (defaults to writel if NULL)
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+ * @suspend: Function called from core code on suspend once per
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+ * chip; can be useful instead of irq_chip::suspend to
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+ * handle chip details even when no interrupts are in use
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+ * @resume: Function called from core code on resume once per chip;
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+ * can be useful instead of irq_chip::suspend to handle
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+ * chip details even when no interrupts are in use
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* @irq_base: Interrupt base nr for this chip
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* @irq_base: Interrupt base nr for this chip
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* @irq_cnt: Number of interrupts handled by this chip
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* @irq_cnt: Number of interrupts handled by this chip
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* @mask_cache: Cached mask register shared between all chip types
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* @mask_cache: Cached mask register shared between all chip types
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@@ -786,6 +794,8 @@ struct irq_chip_generic {
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void __iomem *reg_base;
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void __iomem *reg_base;
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u32 (*reg_readl)(void __iomem *addr);
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u32 (*reg_readl)(void __iomem *addr);
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void (*reg_writel)(u32 val, void __iomem *addr);
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void (*reg_writel)(u32 val, void __iomem *addr);
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+ void (*suspend)(struct irq_chip_generic *gc);
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+ void (*resume)(struct irq_chip_generic *gc);
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unsigned int irq_base;
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unsigned int irq_base;
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unsigned int irq_cnt;
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unsigned int irq_cnt;
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u32 mask_cache;
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u32 mask_cache;
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