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@@ -69,18 +69,10 @@ struct omap_mbox_fifo {
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unsigned long msg;
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unsigned long fifo_stat;
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unsigned long msg_stat;
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-};
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-
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-struct omap_mbox_priv {
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- struct omap_mbox_fifo tx_fifo;
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- struct omap_mbox_fifo rx_fifo;
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unsigned long irqenable;
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unsigned long irqstatus;
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- u32 newmsg_bit;
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- u32 notfull_bit;
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- u32 ctx[OMAP4_MBOX_NR_REGS];
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unsigned long irqdisable;
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- u32 intr_type;
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+ u32 intr_bit;
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};
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struct omap_mbox_queue {
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@@ -97,7 +89,10 @@ struct omap_mbox {
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int irq;
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struct omap_mbox_queue *txq, *rxq;
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struct device *dev;
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- void *priv;
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+ struct omap_mbox_fifo tx_fifo;
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+ struct omap_mbox_fifo rx_fifo;
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+ u32 ctx[OMAP4_MBOX_NR_REGS];
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+ u32 intr_type;
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int use_count;
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struct blocking_notifier_head notifier;
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};
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@@ -124,50 +119,52 @@ static inline void mbox_write_reg(u32 val, size_t ofs)
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/* Mailbox FIFO handle functions */
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static mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
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{
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- struct omap_mbox_fifo *fifo =
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- &((struct omap_mbox_priv *)mbox->priv)->rx_fifo;
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+ struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
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return (mbox_msg_t) mbox_read_reg(fifo->msg);
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}
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static void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
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{
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- struct omap_mbox_fifo *fifo =
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- &((struct omap_mbox_priv *)mbox->priv)->tx_fifo;
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+ struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
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mbox_write_reg(msg, fifo->msg);
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}
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static int mbox_fifo_empty(struct omap_mbox *mbox)
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{
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- struct omap_mbox_fifo *fifo =
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- &((struct omap_mbox_priv *)mbox->priv)->rx_fifo;
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+ struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
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return (mbox_read_reg(fifo->msg_stat) == 0);
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}
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static int mbox_fifo_full(struct omap_mbox *mbox)
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{
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- struct omap_mbox_fifo *fifo =
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- &((struct omap_mbox_priv *)mbox->priv)->tx_fifo;
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+ struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
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return mbox_read_reg(fifo->fifo_stat);
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}
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/* Mailbox IRQ handle functions */
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static void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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- struct omap_mbox_priv *p = mbox->priv;
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- u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
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+ struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
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+ &mbox->tx_fifo : &mbox->rx_fifo;
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+ u32 bit = fifo->intr_bit;
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+ u32 irqstatus = fifo->irqstatus;
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- mbox_write_reg(bit, p->irqstatus);
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+ mbox_write_reg(bit, irqstatus);
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/* Flush posted write for irq status to avoid spurious interrupts */
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- mbox_read_reg(p->irqstatus);
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+ mbox_read_reg(irqstatus);
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}
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static int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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- struct omap_mbox_priv *p = mbox->priv;
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- u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
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- u32 enable = mbox_read_reg(p->irqenable);
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- u32 status = mbox_read_reg(p->irqstatus);
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+ struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
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+ &mbox->tx_fifo : &mbox->rx_fifo;
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+ u32 bit = fifo->intr_bit;
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+ u32 irqenable = fifo->irqenable;
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+ u32 irqstatus = fifo->irqstatus;
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+
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+ u32 enable = mbox_read_reg(irqenable);
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+ u32 status = mbox_read_reg(irqstatus);
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return (int)(enable & status & bit);
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}
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@@ -206,18 +203,17 @@ EXPORT_SYMBOL(omap_mbox_msg_send);
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void omap_mbox_save_ctx(struct omap_mbox *mbox)
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{
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int i;
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- struct omap_mbox_priv *p = mbox->priv;
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int nr_regs;
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- if (p->intr_type)
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+ if (mbox->intr_type)
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nr_regs = OMAP4_MBOX_NR_REGS;
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else
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nr_regs = MBOX_NR_REGS;
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for (i = 0; i < nr_regs; i++) {
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- p->ctx[i] = mbox_read_reg(i * sizeof(u32));
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+ mbox->ctx[i] = mbox_read_reg(i * sizeof(u32));
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dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
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- i, p->ctx[i]);
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+ i, mbox->ctx[i]);
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}
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}
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EXPORT_SYMBOL(omap_mbox_save_ctx);
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@@ -225,46 +221,50 @@ EXPORT_SYMBOL(omap_mbox_save_ctx);
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void omap_mbox_restore_ctx(struct omap_mbox *mbox)
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{
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int i;
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- struct omap_mbox_priv *p = mbox->priv;
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int nr_regs;
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- if (p->intr_type)
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+ if (mbox->intr_type)
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nr_regs = OMAP4_MBOX_NR_REGS;
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else
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nr_regs = MBOX_NR_REGS;
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for (i = 0; i < nr_regs; i++) {
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- mbox_write_reg(p->ctx[i], i * sizeof(u32));
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+ mbox_write_reg(mbox->ctx[i], i * sizeof(u32));
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dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
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- i, p->ctx[i]);
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+ i, mbox->ctx[i]);
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}
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}
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EXPORT_SYMBOL(omap_mbox_restore_ctx);
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void omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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- struct omap_mbox_priv *p = mbox->priv;
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- u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
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+ u32 l;
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+ struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
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+ &mbox->tx_fifo : &mbox->rx_fifo;
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+ u32 bit = fifo->intr_bit;
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+ u32 irqenable = fifo->irqenable;
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- l = mbox_read_reg(p->irqenable);
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+ l = mbox_read_reg(irqenable);
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l |= bit;
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- mbox_write_reg(l, p->irqenable);
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+ mbox_write_reg(l, irqenable);
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}
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EXPORT_SYMBOL(omap_mbox_enable_irq);
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void omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
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{
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- struct omap_mbox_priv *p = mbox->priv;
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- u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
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+ struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
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+ &mbox->tx_fifo : &mbox->rx_fifo;
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+ u32 bit = fifo->intr_bit;
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+ u32 irqdisable = fifo->irqdisable;
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/*
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* Read and update the interrupt configuration register for pre-OMAP4.
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* OMAP4 and later SoCs have a dedicated interrupt disabling register.
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*/
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- if (!p->intr_type)
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- bit = mbox_read_reg(p->irqdisable) & ~bit;
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+ if (!mbox->intr_type)
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+ bit = mbox_read_reg(irqdisable) & ~bit;
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- mbox_write_reg(bit, p->irqdisable);
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+ mbox_write_reg(bit, irqdisable);
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}
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EXPORT_SYMBOL(omap_mbox_disable_irq);
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@@ -548,9 +548,9 @@ static int omap_mbox_probe(struct platform_device *pdev)
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struct resource *mem;
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int ret;
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struct omap_mbox **list, *mbox, *mboxblk;
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- struct omap_mbox_priv *priv, *privblk;
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struct omap_mbox_pdata *pdata = pdev->dev.platform_data;
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struct omap_mbox_dev_info *info;
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+ struct omap_mbox_fifo *fifo;
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u32 intr_type;
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u32 l;
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int i;
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@@ -571,28 +571,28 @@ static int omap_mbox_probe(struct platform_device *pdev)
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if (!mboxblk)
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return -ENOMEM;
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- privblk = devm_kzalloc(&pdev->dev, pdata->info_cnt * sizeof(*priv),
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- GFP_KERNEL);
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- if (!privblk)
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- return -ENOMEM;
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-
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info = pdata->info;
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intr_type = pdata->intr_type;
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mbox = mboxblk;
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- priv = privblk;
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- for (i = 0; i < pdata->info_cnt; i++, info++, priv++) {
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- priv->tx_fifo.msg = MAILBOX_MESSAGE(info->tx_id);
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- priv->tx_fifo.fifo_stat = MAILBOX_FIFOSTATUS(info->tx_id);
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- priv->rx_fifo.msg = MAILBOX_MESSAGE(info->rx_id);
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- priv->rx_fifo.msg_stat = MAILBOX_MSGSTATUS(info->rx_id);
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- priv->notfull_bit = MAILBOX_IRQ_NOTFULL(info->tx_id);
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- priv->newmsg_bit = MAILBOX_IRQ_NEWMSG(info->rx_id);
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- priv->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id);
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- priv->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id);
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- priv->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id);
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- priv->intr_type = intr_type;
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-
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- mbox->priv = priv;
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+ for (i = 0; i < pdata->info_cnt; i++, info++) {
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+ fifo = &mbox->tx_fifo;
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+ fifo->msg = MAILBOX_MESSAGE(info->tx_id);
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+ fifo->fifo_stat = MAILBOX_FIFOSTATUS(info->tx_id);
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+ fifo->intr_bit = MAILBOX_IRQ_NOTFULL(info->tx_id);
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+ fifo->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id);
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+ fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id);
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+ fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id);
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+
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+ fifo = &mbox->rx_fifo;
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+ fifo->msg = MAILBOX_MESSAGE(info->rx_id);
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+ fifo->msg_stat = MAILBOX_MSGSTATUS(info->rx_id);
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+ fifo->intr_bit = MAILBOX_IRQ_NEWMSG(info->rx_id);
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+ fifo->irqenable = MAILBOX_IRQENABLE(intr_type, info->usr_id);
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+ fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, info->usr_id);
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+ fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, info->usr_id);
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+
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+ mbox->intr_type = intr_type;
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+
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mbox->name = info->name;
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mbox->irq = platform_get_irq(pdev, info->irq_id);
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if (mbox->irq < 0)
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