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@@ -1334,23 +1334,10 @@ static void arm_smmu_tlb_inv_range_nosync(unsigned long iova, size_t size,
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static void arm_smmu_flush_pgtable(void *addr, size_t size, void *cookie)
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{
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struct arm_smmu_domain *smmu_domain = cookie;
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- struct arm_smmu_device *smmu = smmu_domain->smmu;
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- unsigned long offset = (unsigned long)addr & ~PAGE_MASK;
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- if (smmu->features & ARM_SMMU_FEAT_COHERENCY) {
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+ /* The page table code handles flushing in the non-coherent case */
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+ if (smmu_domain->smmu->features & ARM_SMMU_FEAT_COHERENCY)
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dsb(ishst);
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- } else {
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- dma_addr_t dma_addr;
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- struct device *dev = smmu->dev;
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-
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- dma_addr = dma_map_page(dev, virt_to_page(addr), offset, size,
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- DMA_TO_DEVICE);
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-
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- if (dma_mapping_error(dev, dma_addr))
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- dev_err(dev, "failed to flush pgtable at %p\n", addr);
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- else
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- dma_unmap_page(dev, dma_addr, size, DMA_TO_DEVICE);
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- }
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}
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static struct iommu_gather_ops arm_smmu_gather_ops = {
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@@ -1532,6 +1519,7 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain)
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.ias = ias,
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.oas = oas,
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.tlb = &arm_smmu_gather_ops,
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+ .iommu_dev = smmu->dev,
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};
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pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain);
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