|
@@ -1392,6 +1392,7 @@ static struct radeon_asic rv770_asic = {
|
|
.get_sclk = &rv770_dpm_get_sclk,
|
|
.get_sclk = &rv770_dpm_get_sclk,
|
|
.get_mclk = &rv770_dpm_get_mclk,
|
|
.get_mclk = &rv770_dpm_get_mclk,
|
|
.print_power_state = &rv770_dpm_print_power_state,
|
|
.print_power_state = &rv770_dpm_print_power_state,
|
|
|
|
+ .debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
|
|
},
|
|
},
|
|
.pflip = {
|
|
.pflip = {
|
|
.pre_page_flip = &rs600_pre_page_flip,
|
|
.pre_page_flip = &rs600_pre_page_flip,
|
|
@@ -1514,6 +1515,7 @@ static struct radeon_asic evergreen_asic = {
|
|
.get_sclk = &rv770_dpm_get_sclk,
|
|
.get_sclk = &rv770_dpm_get_sclk,
|
|
.get_mclk = &rv770_dpm_get_mclk,
|
|
.get_mclk = &rv770_dpm_get_mclk,
|
|
.print_power_state = &rv770_dpm_print_power_state,
|
|
.print_power_state = &rv770_dpm_print_power_state,
|
|
|
|
+ .debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
|
|
},
|
|
},
|
|
.pflip = {
|
|
.pflip = {
|
|
.pre_page_flip = &evergreen_pre_page_flip,
|
|
.pre_page_flip = &evergreen_pre_page_flip,
|
|
@@ -1758,6 +1760,7 @@ static struct radeon_asic btc_asic = {
|
|
.get_sclk = &btc_dpm_get_sclk,
|
|
.get_sclk = &btc_dpm_get_sclk,
|
|
.get_mclk = &btc_dpm_get_mclk,
|
|
.get_mclk = &btc_dpm_get_mclk,
|
|
.print_power_state = &rv770_dpm_print_power_state,
|
|
.print_power_state = &rv770_dpm_print_power_state,
|
|
|
|
+ .debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level,
|
|
},
|
|
},
|
|
.pflip = {
|
|
.pflip = {
|
|
.pre_page_flip = &evergreen_pre_page_flip,
|
|
.pre_page_flip = &evergreen_pre_page_flip,
|