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@@ -11,12 +11,18 @@
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*/
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#define pr_fmt(fmt) "hw perfevents: " fmt
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+#include <linux/bitmap.h>
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+#include <linux/cpumask.h>
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+#include <linux/export.h>
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#include <linux/kernel.h>
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+#include <linux/of.h>
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#include <linux/platform_device.h>
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-#include <linux/pm_runtime.h>
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+#include <linux/slab.h>
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+#include <linux/spinlock.h>
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#include <linux/irq.h>
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#include <linux/irqdesc.h>
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+#include <asm/cputype.h>
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#include <asm/irq_regs.h>
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#include <asm/pmu.h>
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@@ -229,6 +235,10 @@ armpmu_add(struct perf_event *event, int flags)
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int idx;
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int err = 0;
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+ /* An event following a process won't be stopped earlier */
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+ if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
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+ return -ENOENT;
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+
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perf_pmu_disable(event->pmu);
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/* If we don't have a space for the counter then finish early. */
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@@ -344,20 +354,12 @@ static void
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armpmu_release_hardware(struct arm_pmu *armpmu)
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{
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armpmu->free_irq(armpmu);
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- pm_runtime_put_sync(&armpmu->plat_device->dev);
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}
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static int
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armpmu_reserve_hardware(struct arm_pmu *armpmu)
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{
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- int err;
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- struct platform_device *pmu_device = armpmu->plat_device;
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-
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- if (!pmu_device)
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- return -ENODEV;
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-
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- pm_runtime_get_sync(&pmu_device->dev);
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- err = armpmu->request_irq(armpmu, armpmu_dispatch_irq);
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+ int err = armpmu->request_irq(armpmu, armpmu_dispatch_irq);
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if (err) {
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armpmu_release_hardware(armpmu);
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return err;
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@@ -454,6 +456,17 @@ static int armpmu_event_init(struct perf_event *event)
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int err = 0;
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atomic_t *active_events = &armpmu->active_events;
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+ /*
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+ * Reject CPU-affine events for CPUs that are of a different class to
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+ * that which this PMU handles. Process-following events (where
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+ * event->cpu == -1) can be migrated between CPUs, and thus we have to
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+ * reject them later (in armpmu_add) if they're scheduled on a
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+ * different class of CPU.
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+ */
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+ if (event->cpu != -1 &&
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+ !cpumask_test_cpu(event->cpu, &armpmu->supported_cpus))
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+ return -ENOENT;
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+
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/* does not support taken branch sampling */
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if (has_branch_stack(event))
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return -EOPNOTSUPP;
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@@ -489,6 +502,10 @@ static void armpmu_enable(struct pmu *pmu)
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struct pmu_hw_events *hw_events = this_cpu_ptr(armpmu->hw_events);
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int enabled = bitmap_weight(hw_events->used_mask, armpmu->num_events);
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+ /* For task-bound events we may be called on other CPUs */
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+ if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
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+ return;
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+
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if (enabled)
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armpmu->start(armpmu);
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}
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@@ -496,34 +513,25 @@ static void armpmu_enable(struct pmu *pmu)
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static void armpmu_disable(struct pmu *pmu)
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{
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struct arm_pmu *armpmu = to_arm_pmu(pmu);
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- armpmu->stop(armpmu);
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-}
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-
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-#ifdef CONFIG_PM
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-static int armpmu_runtime_resume(struct device *dev)
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-{
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- struct arm_pmu_platdata *plat = dev_get_platdata(dev);
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- if (plat && plat->runtime_resume)
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- return plat->runtime_resume(dev);
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+ /* For task-bound events we may be called on other CPUs */
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+ if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
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+ return;
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- return 0;
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+ armpmu->stop(armpmu);
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}
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-static int armpmu_runtime_suspend(struct device *dev)
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+/*
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+ * In heterogeneous systems, events are specific to a particular
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+ * microarchitecture, and aren't suitable for another. Thus, only match CPUs of
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+ * the same microarchitecture.
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+ */
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+static int armpmu_filter_match(struct perf_event *event)
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{
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- struct arm_pmu_platdata *plat = dev_get_platdata(dev);
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-
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- if (plat && plat->runtime_suspend)
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- return plat->runtime_suspend(dev);
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-
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- return 0;
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+ struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
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+ unsigned int cpu = smp_processor_id();
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+ return cpumask_test_cpu(cpu, &armpmu->supported_cpus);
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}
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-#endif
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-
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-const struct dev_pm_ops armpmu_dev_pm_ops = {
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- SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL)
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-};
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static void armpmu_init(struct arm_pmu *armpmu)
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{
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@@ -539,15 +547,349 @@ static void armpmu_init(struct arm_pmu *armpmu)
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.start = armpmu_start,
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.stop = armpmu_stop,
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.read = armpmu_read,
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+ .filter_match = armpmu_filter_match,
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};
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}
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int armpmu_register(struct arm_pmu *armpmu, int type)
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{
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armpmu_init(armpmu);
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- pm_runtime_enable(&armpmu->plat_device->dev);
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pr_info("enabled with %s PMU driver, %d counters available\n",
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armpmu->name, armpmu->num_events);
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return perf_pmu_register(&armpmu->pmu, armpmu->name, type);
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}
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+/* Set at runtime when we know what CPU type we are. */
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+static struct arm_pmu *__oprofile_cpu_pmu;
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+
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+/*
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+ * Despite the names, these two functions are CPU-specific and are used
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+ * by the OProfile/perf code.
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+ */
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+const char *perf_pmu_name(void)
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+{
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+ if (!__oprofile_cpu_pmu)
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+ return NULL;
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+
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+ return __oprofile_cpu_pmu->name;
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+}
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+EXPORT_SYMBOL_GPL(perf_pmu_name);
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+
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+int perf_num_counters(void)
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+{
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+ int max_events = 0;
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+
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+ if (__oprofile_cpu_pmu != NULL)
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+ max_events = __oprofile_cpu_pmu->num_events;
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+
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+ return max_events;
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+}
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+EXPORT_SYMBOL_GPL(perf_num_counters);
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+
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+static void cpu_pmu_enable_percpu_irq(void *data)
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+{
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+ int irq = *(int *)data;
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+
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+ enable_percpu_irq(irq, IRQ_TYPE_NONE);
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+}
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+
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+static void cpu_pmu_disable_percpu_irq(void *data)
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+{
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+ int irq = *(int *)data;
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+
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+ disable_percpu_irq(irq);
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+}
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+
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+static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
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+{
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+ int i, irq, irqs;
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+ struct platform_device *pmu_device = cpu_pmu->plat_device;
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+ struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
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+
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+ irqs = min(pmu_device->num_resources, num_possible_cpus());
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+
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+ irq = platform_get_irq(pmu_device, 0);
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+ if (irq >= 0 && irq_is_percpu(irq)) {
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+ on_each_cpu(cpu_pmu_disable_percpu_irq, &irq, 1);
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+ free_percpu_irq(irq, &hw_events->percpu_pmu);
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+ } else {
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+ for (i = 0; i < irqs; ++i) {
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+ int cpu = i;
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+
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+ if (cpu_pmu->irq_affinity)
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+ cpu = cpu_pmu->irq_affinity[i];
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+
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+ if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs))
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+ continue;
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+ irq = platform_get_irq(pmu_device, i);
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+ if (irq >= 0)
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+ free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, cpu));
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+ }
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+ }
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+}
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+
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+static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
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+{
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+ int i, err, irq, irqs;
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+ struct platform_device *pmu_device = cpu_pmu->plat_device;
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+ struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
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+
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+ if (!pmu_device)
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+ return -ENODEV;
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+
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+ irqs = min(pmu_device->num_resources, num_possible_cpus());
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+ if (irqs < 1) {
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+ pr_warn_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");
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+ return 0;
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+ }
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+
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+ irq = platform_get_irq(pmu_device, 0);
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+ if (irq >= 0 && irq_is_percpu(irq)) {
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+ err = request_percpu_irq(irq, handler, "arm-pmu",
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+ &hw_events->percpu_pmu);
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+ if (err) {
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+ pr_err("unable to request IRQ%d for ARM PMU counters\n",
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+ irq);
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+ return err;
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+ }
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+ on_each_cpu(cpu_pmu_enable_percpu_irq, &irq, 1);
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+ } else {
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+ for (i = 0; i < irqs; ++i) {
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+ int cpu = i;
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+
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+ err = 0;
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+ irq = platform_get_irq(pmu_device, i);
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+ if (irq < 0)
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+ continue;
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+
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+ if (cpu_pmu->irq_affinity)
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+ cpu = cpu_pmu->irq_affinity[i];
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+
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+ /*
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+ * If we have a single PMU interrupt that we can't shift,
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+ * assume that we're running on a uniprocessor machine and
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+ * continue. Otherwise, continue without this interrupt.
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+ */
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+ if (irq_set_affinity(irq, cpumask_of(cpu)) && irqs > 1) {
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+ pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
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+ irq, cpu);
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+ continue;
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+ }
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+
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+ err = request_irq(irq, handler,
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+ IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
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+ per_cpu_ptr(&hw_events->percpu_pmu, cpu));
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+ if (err) {
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+ pr_err("unable to request IRQ%d for ARM PMU counters\n",
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+ irq);
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+ return err;
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+ }
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+
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+ cpumask_set_cpu(cpu, &cpu_pmu->active_irqs);
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+/*
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+ * PMU hardware loses all context when a CPU goes offline.
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+ * When a CPU is hotplugged back in, since some hardware registers are
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+ * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
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+ * junk values out of them.
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+ */
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+static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
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+ void *hcpu)
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+{
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+ int cpu = (unsigned long)hcpu;
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+ struct arm_pmu *pmu = container_of(b, struct arm_pmu, hotplug_nb);
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+
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+ if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
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+ return NOTIFY_DONE;
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+
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+ if (!cpumask_test_cpu(cpu, &pmu->supported_cpus))
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+ return NOTIFY_DONE;
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+
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+ if (pmu->reset)
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+ pmu->reset(pmu);
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+ else
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+ return NOTIFY_DONE;
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+
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+ return NOTIFY_OK;
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+}
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+
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+static int cpu_pmu_init(struct arm_pmu *cpu_pmu)
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+{
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+ int err;
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+ int cpu;
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+ struct pmu_hw_events __percpu *cpu_hw_events;
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+
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+ cpu_hw_events = alloc_percpu(struct pmu_hw_events);
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+ if (!cpu_hw_events)
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+ return -ENOMEM;
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+
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+ cpu_pmu->hotplug_nb.notifier_call = cpu_pmu_notify;
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+ err = register_cpu_notifier(&cpu_pmu->hotplug_nb);
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+ if (err)
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+ goto out_hw_events;
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+
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+ for_each_possible_cpu(cpu) {
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+ struct pmu_hw_events *events = per_cpu_ptr(cpu_hw_events, cpu);
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+ raw_spin_lock_init(&events->pmu_lock);
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+ events->percpu_pmu = cpu_pmu;
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+ }
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+
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+ cpu_pmu->hw_events = cpu_hw_events;
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+ cpu_pmu->request_irq = cpu_pmu_request_irq;
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+ cpu_pmu->free_irq = cpu_pmu_free_irq;
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+
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+ /* Ensure the PMU has sane values out of reset. */
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+ if (cpu_pmu->reset)
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+ on_each_cpu_mask(&cpu_pmu->supported_cpus, cpu_pmu->reset,
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+ cpu_pmu, 1);
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+
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+ /* If no interrupts available, set the corresponding capability flag */
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+ if (!platform_get_irq(cpu_pmu->plat_device, 0))
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+ cpu_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
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+
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+ return 0;
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+
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+out_hw_events:
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+ free_percpu(cpu_hw_events);
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+ return err;
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+}
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+
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+static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)
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+{
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+ unregister_cpu_notifier(&cpu_pmu->hotplug_nb);
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+ free_percpu(cpu_pmu->hw_events);
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+}
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+
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+/*
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+ * CPU PMU identification and probing.
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+ */
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+static int probe_current_pmu(struct arm_pmu *pmu,
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+ const struct pmu_probe_info *info)
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+{
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+ int cpu = get_cpu();
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+ unsigned int cpuid = read_cpuid_id();
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+ int ret = -ENODEV;
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+
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+ pr_info("probing PMU on CPU %d\n", cpu);
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+
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+ for (; info->init != NULL; info++) {
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+ if ((cpuid & info->mask) != info->cpuid)
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+ continue;
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+ ret = info->init(pmu);
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+ break;
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+ }
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+
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+ put_cpu();
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+ return ret;
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+}
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+
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+static int of_pmu_irq_cfg(struct arm_pmu *pmu)
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+{
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+ int i, irq, *irqs;
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+ struct platform_device *pdev = pmu->plat_device;
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+
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+ /* Don't bother with PPIs; they're already affine */
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+ irq = platform_get_irq(pdev, 0);
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+ if (irq >= 0 && irq_is_percpu(irq))
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+ return 0;
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+
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+ irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
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+ if (!irqs)
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+ return -ENOMEM;
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+
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+ for (i = 0; i < pdev->num_resources; ++i) {
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+ struct device_node *dn;
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+ int cpu;
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+
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+ dn = of_parse_phandle(pdev->dev.of_node, "interrupt-affinity",
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+ i);
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+ if (!dn) {
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+ pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",
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+ of_node_full_name(pdev->dev.of_node), i);
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+ break;
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|
|
+ }
|
|
|
+
|
|
|
+ for_each_possible_cpu(cpu)
|
|
|
+ if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))
|
|
|
+ break;
|
|
|
+
|
|
|
+ of_node_put(dn);
|
|
|
+ if (cpu >= nr_cpu_ids) {
|
|
|
+ pr_warn("Failed to find logical CPU for %s\n",
|
|
|
+ dn->name);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ irqs[i] = cpu;
|
|
|
+ cpumask_set_cpu(cpu, &pmu->supported_cpus);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (i == pdev->num_resources) {
|
|
|
+ pmu->irq_affinity = irqs;
|
|
|
+ } else {
|
|
|
+ kfree(irqs);
|
|
|
+ cpumask_setall(&pmu->supported_cpus);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+int arm_pmu_device_probe(struct platform_device *pdev,
|
|
|
+ const struct of_device_id *of_table,
|
|
|
+ const struct pmu_probe_info *probe_table)
|
|
|
+{
|
|
|
+ const struct of_device_id *of_id;
|
|
|
+ const int (*init_fn)(struct arm_pmu *);
|
|
|
+ struct device_node *node = pdev->dev.of_node;
|
|
|
+ struct arm_pmu *pmu;
|
|
|
+ int ret = -ENODEV;
|
|
|
+
|
|
|
+ pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);
|
|
|
+ if (!pmu) {
|
|
|
+ pr_info("failed to allocate PMU device!\n");
|
|
|
+ return -ENOMEM;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (!__oprofile_cpu_pmu)
|
|
|
+ __oprofile_cpu_pmu = pmu;
|
|
|
+
|
|
|
+ pmu->plat_device = pdev;
|
|
|
+
|
|
|
+ if (node && (of_id = of_match_node(of_table, pdev->dev.of_node))) {
|
|
|
+ init_fn = of_id->data;
|
|
|
+
|
|
|
+ ret = of_pmu_irq_cfg(pmu);
|
|
|
+ if (!ret)
|
|
|
+ ret = init_fn(pmu);
|
|
|
+ } else {
|
|
|
+ ret = probe_current_pmu(pmu, probe_table);
|
|
|
+ cpumask_setall(&pmu->supported_cpus);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (ret) {
|
|
|
+ pr_info("failed to probe PMU!\n");
|
|
|
+ goto out_free;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = cpu_pmu_init(pmu);
|
|
|
+ if (ret)
|
|
|
+ goto out_free;
|
|
|
+
|
|
|
+ ret = armpmu_register(pmu, -1);
|
|
|
+ if (ret)
|
|
|
+ goto out_destroy;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+out_destroy:
|
|
|
+ cpu_pmu_destroy(pmu);
|
|
|
+out_free:
|
|
|
+ pr_info("failed to register PMU devices!\n");
|
|
|
+ kfree(pmu);
|
|
|
+ return ret;
|
|
|
+}
|