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@@ -1785,7 +1785,7 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
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struct i40e_pf *pf = vsi->back;
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u16 sections = 0;
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u8 netdev_tc = 0;
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- u16 numtc = 0;
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+ u16 numtc = 1;
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u16 qcount;
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u8 offset;
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u16 qmap;
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@@ -1795,9 +1795,11 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
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sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
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offset = 0;
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+ /* Number of queues per enabled TC */
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+ num_tc_qps = vsi->alloc_queue_pairs;
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if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
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/* Find numtc from enabled TC bitmap */
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- for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
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+ for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
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if (enabled_tc & BIT(i)) /* TC is enabled */
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numtc++;
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}
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@@ -1805,18 +1807,13 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
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dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
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numtc = 1;
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}
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- } else {
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- /* At least TC0 is enabled in non-DCB, non-MQPRIO case */
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- numtc = 1;
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+ num_tc_qps = num_tc_qps / numtc;
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+ num_tc_qps = min_t(int, num_tc_qps,
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+ i40e_pf_get_max_q_per_tc(pf));
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}
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vsi->tc_config.numtc = numtc;
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vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
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- /* Number of queues per enabled TC */
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- qcount = vsi->alloc_queue_pairs;
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-
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- num_tc_qps = qcount / numtc;
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- num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
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/* Do not allow use more TC queue pairs than MSI-X vectors exist */
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if (pf->flags & I40E_FLAG_MSIX_ENABLED)
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@@ -1831,9 +1828,13 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
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switch (vsi->type) {
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case I40E_VSI_MAIN:
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- qcount = min_t(int, pf->alloc_rss_size,
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- num_tc_qps);
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- break;
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+ if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
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+ I40E_FLAG_FD_ATR_ENABLED)) ||
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+ vsi->tc_config.enabled_tc != 1) {
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+ qcount = min_t(int, pf->alloc_rss_size,
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+ num_tc_qps);
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+ break;
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+ }
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case I40E_VSI_FDIR:
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case I40E_VSI_SRIOV:
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case I40E_VSI_VMDQ2:
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