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@@ -135,10 +135,36 @@ _GLOBAL(power7_sleep)
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b power7_powersave_common
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/* No return */
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+#define CHECK_HMI_INTERRUPT \
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+ mfspr r0,SPRN_SRR1; \
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+BEGIN_FTR_SECTION_NESTED(66); \
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+ rlwinm r0,r0,45-31,0xf; /* extract wake reason field (P8) */ \
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+FTR_SECTION_ELSE_NESTED(66); \
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+ rlwinm r0,r0,45-31,0xe; /* P7 wake reason field is 3 bits */ \
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+ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 66); \
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+ cmpwi r0,0xa; /* Hypervisor maintenance ? */ \
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+ bne 20f; \
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+ /* Invoke opal call to handle hmi */ \
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+ ld r2,PACATOC(r13); \
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+ ld r1,PACAR1(r13); \
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+ std r3,ORIG_GPR3(r1); /* Save original r3 */ \
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+ li r0,OPAL_HANDLE_HMI; \
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+ LOAD_REG_ADDR(r11,opal); \
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+ ld r12,8(r11); \
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+ ld r2,0(r11); \
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+ mtctr r12; \
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+ bctrl; \
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+ ld r3,ORIG_GPR3(r1); /* Restore original r3 */ \
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+20: nop;
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+
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+
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_GLOBAL(power7_wakeup_tb_loss)
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ld r2,PACATOC(r13);
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ld r1,PACAR1(r13)
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+BEGIN_FTR_SECTION
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+ CHECK_HMI_INTERRUPT
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+END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
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/* Time base re-sync */
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li r0,OPAL_RESYNC_TIMEBASE
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LOAD_REG_ADDR(r11,opal);
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@@ -163,6 +189,9 @@ _GLOBAL(power7_wakeup_tb_loss)
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_GLOBAL(power7_wakeup_loss)
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ld r1,PACAR1(r13)
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+BEGIN_FTR_SECTION
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+ CHECK_HMI_INTERRUPT
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+END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
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REST_NVGPRS(r1)
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REST_GPR(2, r1)
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ld r3,_CCR(r1)
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@@ -178,6 +207,9 @@ _GLOBAL(power7_wakeup_noloss)
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lbz r0,PACA_NAPSTATELOST(r13)
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cmpwi r0,0
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bne power7_wakeup_loss
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+BEGIN_FTR_SECTION
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+ CHECK_HMI_INTERRUPT
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+END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
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ld r1,PACAR1(r13)
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ld r4,_MSR(r1)
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ld r5,_NIP(r1)
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