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@@ -79,6 +79,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA9887_HW_1_0_VERSION,
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@@ -107,6 +108,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA6174_HW_2_1_VERSION,
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@@ -134,6 +136,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA6174_HW_2_1_VERSION,
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@@ -161,6 +164,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA6174_HW_3_0_VERSION,
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@@ -188,6 +192,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA6174_HW_3_2_VERSION,
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@@ -218,6 +223,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA99X0_HW_2_0_DEV_VERSION,
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@@ -251,6 +257,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA9984_HW_1_0_DEV_VERSION,
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@@ -289,6 +296,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA9888_HW_2_0_DEV_VERSION,
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@@ -326,6 +334,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA9377_HW_1_0_DEV_VERSION,
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@@ -353,6 +362,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA9377_HW_1_1_DEV_VERSION,
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@@ -382,6 +392,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = QCA4019_HW_1_0_DEV_VERSION,
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@@ -416,6 +427,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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},
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{
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.id = WCN3990_HW_1_0_DEV_VERSION,
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@@ -435,6 +447,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT,
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.num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES,
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.target_64bit = true,
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+ .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
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},
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};
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