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@@ -154,6 +154,13 @@ static bool mcasp_is_synchronous(struct davinci_mcasp *mcasp)
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static void mcasp_start_rx(struct davinci_mcasp *mcasp)
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{
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+ if (mcasp->rxnumevt) { /* enable FIFO */
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+ u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET;
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+
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+ mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
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+ mcasp_set_bits(mcasp, reg, FIFO_ENABLE);
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+ }
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+
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/* Start clocks */
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mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST);
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mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST);
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@@ -181,6 +188,13 @@ static void mcasp_start_tx(struct davinci_mcasp *mcasp)
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{
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u32 cnt;
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+ if (mcasp->txnumevt) { /* enable FIFO */
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+ u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET;
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+
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+ mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
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+ mcasp_set_bits(mcasp, reg, FIFO_ENABLE);
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+ }
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+
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/* Start clocks */
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mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXHCLKRST);
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mcasp_set_ctl_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, TXCLKRST);
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@@ -201,25 +215,12 @@ static void mcasp_start_tx(struct davinci_mcasp *mcasp)
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static void davinci_mcasp_start(struct davinci_mcasp *mcasp, int stream)
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{
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- u32 reg;
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-
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mcasp->streams++;
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- if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
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- if (mcasp->txnumevt) { /* enable FIFO */
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- reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET;
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- mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
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- mcasp_set_bits(mcasp, reg, FIFO_ENABLE);
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- }
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+ if (stream == SNDRV_PCM_STREAM_PLAYBACK)
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mcasp_start_tx(mcasp);
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- } else {
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- if (mcasp->rxnumevt) { /* enable FIFO */
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- reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET;
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- mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);
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- mcasp_set_bits(mcasp, reg, FIFO_ENABLE);
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- }
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+ else
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mcasp_start_rx(mcasp);
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- }
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}
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static void mcasp_stop_rx(struct davinci_mcasp *mcasp)
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