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@@ -41,7 +41,7 @@
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#define PP_CHECK_HW(hwmgr) \
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#define PP_CHECK_HW(hwmgr) \
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do { \
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do { \
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if ((hwmgr) == NULL || (hwmgr)->hwmgr_func == NULL) \
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if ((hwmgr) == NULL || (hwmgr)->hwmgr_func == NULL) \
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- return -EINVAL; \
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+ return 0; \
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} while (0)
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} while (0)
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static int pp_early_init(void *handle)
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static int pp_early_init(void *handle)
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@@ -115,6 +115,7 @@ static int pp_hw_init(void *handle)
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struct pp_instance *pp_handle;
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struct pp_instance *pp_handle;
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struct pp_smumgr *smumgr;
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struct pp_smumgr *smumgr;
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struct pp_eventmgr *eventmgr;
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struct pp_eventmgr *eventmgr;
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+ struct pp_hwmgr *hwmgr;
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int ret = 0;
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int ret = 0;
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if (handle == NULL)
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if (handle == NULL)
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@@ -122,6 +123,7 @@ static int pp_hw_init(void *handle)
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pp_handle = (struct pp_instance *)handle;
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pp_handle = (struct pp_instance *)handle;
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smumgr = pp_handle->smu_mgr;
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smumgr = pp_handle->smu_mgr;
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+ hwmgr = pp_handle->hwmgr;
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if (smumgr == NULL || smumgr->smumgr_funcs == NULL ||
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if (smumgr == NULL || smumgr->smumgr_funcs == NULL ||
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smumgr->smumgr_funcs->smu_init == NULL ||
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smumgr->smumgr_funcs->smu_init == NULL ||
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@@ -141,9 +143,11 @@ static int pp_hw_init(void *handle)
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return ret;
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return ret;
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}
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}
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- hw_init_power_state_table(pp_handle->hwmgr);
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- eventmgr = pp_handle->eventmgr;
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+ PP_CHECK_HW(hwmgr);
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+ hw_init_power_state_table(hwmgr);
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+
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+ eventmgr = pp_handle->eventmgr;
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if (eventmgr == NULL || eventmgr->pp_eventmgr_init == NULL)
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if (eventmgr == NULL || eventmgr->pp_eventmgr_init == NULL)
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return -EINVAL;
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return -EINVAL;
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@@ -243,7 +247,9 @@ static int pp_suspend(void *handle)
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pp_handle = (struct pp_instance *)handle;
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pp_handle = (struct pp_instance *)handle;
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eventmgr = pp_handle->eventmgr;
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eventmgr = pp_handle->eventmgr;
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- pem_handle_event(eventmgr, AMD_PP_EVENT_SUSPEND, &event_data);
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+
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+ if (eventmgr != NULL)
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+ pem_handle_event(eventmgr, AMD_PP_EVENT_SUSPEND, &event_data);
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return 0;
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return 0;
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}
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}
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@@ -273,7 +279,8 @@ static int pp_resume(void *handle)
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}
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}
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eventmgr = pp_handle->eventmgr;
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eventmgr = pp_handle->eventmgr;
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- pem_handle_event(eventmgr, AMD_PP_EVENT_RESUME, &event_data);
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+ if (eventmgr != NULL)
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+ pem_handle_event(eventmgr, AMD_PP_EVENT_RESUME, &event_data);
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return 0;
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return 0;
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}
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}
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@@ -340,8 +347,7 @@ static enum amd_dpm_forced_level pp_dpm_get_performance_level(
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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- if (hwmgr == NULL)
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- return -EINVAL;
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+ PP_CHECK_HW(hwmgr);
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return (((struct pp_instance *)handle)->hwmgr->dpm_level);
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return (((struct pp_instance *)handle)->hwmgr->dpm_level);
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}
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}
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@@ -448,6 +454,9 @@ static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id,
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if (pp_handle == NULL)
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if (pp_handle == NULL)
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return -EINVAL;
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return -EINVAL;
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+ if (pp_handle->eventmgr == NULL)
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+ return 0;
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+
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switch (event_id) {
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switch (event_id) {
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case AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE:
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case AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE:
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ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);
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ret = pem_handle_event(pp_handle->eventmgr, event_id, &data);
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@@ -899,6 +908,12 @@ static int amd_pp_instance_init(struct amd_pp_init *pp_init,
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if (ret)
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if (ret)
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goto fail_smum;
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goto fail_smum;
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+
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+ amd_pp->pp_handle = handle;
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+
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+ if (amdgpu_dpm == 0)
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+ return 0;
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+
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ret = hwmgr_init(pp_init, handle);
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ret = hwmgr_init(pp_init, handle);
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if (ret)
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if (ret)
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goto fail_hwmgr;
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goto fail_hwmgr;
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@@ -907,7 +922,6 @@ static int amd_pp_instance_init(struct amd_pp_init *pp_init,
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if (ret)
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if (ret)
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goto fail_eventmgr;
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goto fail_eventmgr;
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- amd_pp->pp_handle = handle;
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return 0;
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return 0;
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fail_eventmgr:
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fail_eventmgr:
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@@ -926,12 +940,12 @@ static int amd_pp_instance_fini(void *handle)
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if (instance == NULL)
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if (instance == NULL)
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return -EINVAL;
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return -EINVAL;
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- eventmgr_fini(instance->eventmgr);
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-
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- hwmgr_fini(instance->hwmgr);
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+ if (amdgpu_dpm != 0) {
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+ eventmgr_fini(instance->eventmgr);
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+ hwmgr_fini(instance->hwmgr);
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+ }
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smum_fini(instance->smu_mgr);
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smum_fini(instance->smu_mgr);
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-
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kfree(handle);
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kfree(handle);
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return 0;
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return 0;
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}
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}
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@@ -990,6 +1004,9 @@ int amd_powerplay_reset(void *handle)
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hw_init_power_state_table(instance->hwmgr);
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hw_init_power_state_table(instance->hwmgr);
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+ if (amdgpu_dpm == 0)
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+ return 0;
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+
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if (eventmgr == NULL || eventmgr->pp_eventmgr_init == NULL)
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if (eventmgr == NULL || eventmgr->pp_eventmgr_init == NULL)
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return -EINVAL;
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return -EINVAL;
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@@ -1011,6 +1028,8 @@ int amd_powerplay_display_configuration_change(void *handle,
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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+ PP_CHECK_HW(hwmgr);
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+
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phm_store_dal_configuration_data(hwmgr, display_config);
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phm_store_dal_configuration_data(hwmgr, display_config);
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return 0;
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return 0;
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@@ -1028,6 +1047,8 @@ int amd_powerplay_get_display_power_level(void *handle,
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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+ PP_CHECK_HW(hwmgr);
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+
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return phm_get_dal_power_level(hwmgr, output);
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return phm_get_dal_power_level(hwmgr, output);
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}
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}
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@@ -1045,6 +1066,8 @@ int amd_powerplay_get_current_clocks(void *handle,
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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+ PP_CHECK_HW(hwmgr);
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+
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phm_get_dal_power_level(hwmgr, &simple_clocks);
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phm_get_dal_power_level(hwmgr, &simple_clocks);
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PowerContainment)) {
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PowerContainment)) {
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@@ -1089,6 +1112,8 @@ int amd_powerplay_get_clock_by_type(void *handle, enum amd_pp_clock_type type, s
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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+ PP_CHECK_HW(hwmgr);
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+
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result = phm_get_clock_by_type(hwmgr, type, clocks);
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result = phm_get_clock_by_type(hwmgr, type, clocks);
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return result;
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return result;
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@@ -1107,6 +1132,8 @@ int amd_powerplay_get_display_mode_validation_clocks(void *handle,
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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hwmgr = ((struct pp_instance *)handle)->hwmgr;
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+ PP_CHECK_HW(hwmgr);
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+
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DynamicPatchPowerState))
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DynamicPatchPowerState))
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result = phm_get_max_high_clocks(hwmgr, clocks);
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result = phm_get_max_high_clocks(hwmgr, clocks);
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