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@@ -62,7 +62,7 @@ config USB_DWC3_OMAP
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config USB_DWC3_EXYNOS
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tristate "Samsung Exynos Platform"
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- depends on ARCH_EXYNOS && OF || COMPILE_TEST
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+ depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
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default USB_DWC3
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help
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Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
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@@ -98,7 +98,7 @@ config USB_DWC3_OF_SIMPLE
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config USB_DWC3_ST
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tristate "STMicroelectronics Platforms"
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- depends on ARCH_STI && OF
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+ depends on (ARCH_STI || COMPILE_TEST) && OF
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default USB_DWC3
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help
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STMicroelectronics SoCs with one DesignWare Core USB3 IP
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