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@@ -4973,14 +4973,15 @@ static void intel_print_rc6_info(struct drm_i915_private *dev_priv, u32 mode)
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mode = 0;
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}
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if (HAS_RC6p(dev_priv))
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- DRM_DEBUG_KMS("Enabling RC6 states: RC6 %s RC6p %s RC6pp %s\n",
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- onoff(mode & GEN6_RC_CTL_RC6_ENABLE),
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- onoff(mode & GEN6_RC_CTL_RC6p_ENABLE),
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- onoff(mode & GEN6_RC_CTL_RC6pp_ENABLE));
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+ DRM_DEBUG_DRIVER("Enabling RC6 states: "
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+ "RC6 %s RC6p %s RC6pp %s\n",
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+ onoff(mode & GEN6_RC_CTL_RC6_ENABLE),
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+ onoff(mode & GEN6_RC_CTL_RC6p_ENABLE),
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+ onoff(mode & GEN6_RC_CTL_RC6pp_ENABLE));
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else
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- DRM_DEBUG_KMS("Enabling RC6 states: RC6 %s\n",
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- onoff(mode & GEN6_RC_CTL_RC6_ENABLE));
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+ DRM_DEBUG_DRIVER("Enabling RC6 states: RC6 %s\n",
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+ onoff(mode & GEN6_RC_CTL_RC6_ENABLE));
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}
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static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
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@@ -4990,7 +4991,7 @@ static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
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unsigned long rc6_ctx_base;
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if (!(I915_READ(RC6_LOCATION) & RC6_CTX_IN_DRAM)) {
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- DRM_DEBUG_KMS("RC6 Base location not set properly.\n");
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+ DRM_DEBUG_DRIVER("RC6 Base location not set properly.\n");
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enable_rc6 = false;
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}
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@@ -5002,7 +5003,7 @@ static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
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if (!((rc6_ctx_base >= ggtt->stolen_reserved_base) &&
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(rc6_ctx_base + PAGE_SIZE <= ggtt->stolen_reserved_base +
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ggtt->stolen_reserved_size))) {
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- DRM_DEBUG_KMS("RC6 Base address not as expected.\n");
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+ DRM_DEBUG_DRIVER("RC6 Base address not as expected.\n");
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enable_rc6 = false;
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}
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@@ -5010,7 +5011,7 @@ static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
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((I915_READ(PWRCTX_MAXCNT_VCSUNIT0) & IDLE_TIME_MASK) > 1) &&
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((I915_READ(PWRCTX_MAXCNT_BCSUNIT) & IDLE_TIME_MASK) > 1) &&
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((I915_READ(PWRCTX_MAXCNT_VECSUNIT) & IDLE_TIME_MASK) > 1))) {
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- DRM_DEBUG_KMS("Engine Idle wait time not set properly.\n");
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+ DRM_DEBUG_DRIVER("Engine Idle wait time not set properly.\n");
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enable_rc6 = false;
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}
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@@ -5018,7 +5019,7 @@ static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
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GEN6_RC_CTL_HW_ENABLE)) &&
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((I915_READ(GEN6_RC_CONTROL) & GEN6_RC_CTL_HW_ENABLE) ||
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!(I915_READ(GEN6_RC_STATE) & RC6_STATE))) {
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- DRM_DEBUG_KMS("HW/SW RC6 is not enabled by BIOS.\n");
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+ DRM_DEBUG_DRIVER("HW/SW RC6 is not enabled by BIOS.\n");
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enable_rc6 = false;
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}
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@@ -5050,8 +5051,9 @@ int sanitize_rc6_option(struct drm_i915_private *dev_priv, int enable_rc6)
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mask = INTEL_RC6_ENABLE;
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if ((enable_rc6 & mask) != enable_rc6)
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- DRM_DEBUG_KMS("Adjusting RC6 mask to %d (requested %d, valid %d)\n",
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- enable_rc6 & mask, enable_rc6, mask);
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+ DRM_DEBUG_DRIVER("Adjusting RC6 mask to %d "
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+ "(requested %d, valid %d)\n",
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+ enable_rc6 & mask, enable_rc6, mask);
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return enable_rc6 & mask;
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}
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