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@@ -23,8 +23,10 @@
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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+#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <linux/thermal.h>
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+#include <linux/mfd/syscon.h>
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#include <linux/pinctrl/consumer.h>
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/**
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@@ -97,7 +99,8 @@ struct rockchip_tsadc_chip {
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enum tshut_polarity tshut_polarity;
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/* Chip-wide methods */
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- void (*initialize)(void __iomem *reg, enum tshut_polarity p);
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+ void (*initialize)(struct regmap *grf,
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+ void __iomem *reg, enum tshut_polarity p);
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void (*irq_ack)(void __iomem *reg);
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void (*control)(void __iomem *reg, bool on);
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@@ -128,6 +131,7 @@ struct rockchip_thermal_data {
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struct clk *clk;
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struct clk *pclk;
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+ struct regmap *grf;
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void __iomem *regs;
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int tshut_temp;
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@@ -142,6 +146,7 @@ struct rockchip_thermal_data {
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* TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
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*
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*/
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+#define TSADCV2_USER_CON 0x00
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#define TSADCV2_AUTO_CON 0x04
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#define TSADCV2_INT_EN 0x08
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#define TSADCV2_INT_PD 0x0c
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@@ -177,6 +182,16 @@ struct rockchip_thermal_data {
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#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
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#define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
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#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
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+#define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
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+
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+#define GRF_SARADC_TESTBIT 0x0e644
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+#define GRF_TSADC_TESTBIT_L 0x0e648
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+#define GRF_TSADC_TESTBIT_H 0x0e64c
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+
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+#define GRF_TSADC_TSEN_PD_ON (0x30003 << 0)
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+#define GRF_TSADC_TSEN_PD_OFF (0x30000 << 0)
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+#define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
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+#define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
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struct tsadc_table {
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u32 code;
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@@ -449,7 +464,7 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
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* If the temperature is higher than COMP_INT or COMP_SHUT for
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* "debounce" times, TSADC controller will generate interrupt or TSHUT.
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*/
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-static void rk_tsadcv2_initialize(void __iomem *regs,
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+static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
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enum tshut_polarity tshut_polarity)
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{
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if (tshut_polarity == TSHUT_HIGH_ACTIVE)
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@@ -466,6 +481,61 @@ static void rk_tsadcv2_initialize(void __iomem *regs,
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regs + TSADCV2_AUTO_PERIOD_HT);
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writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
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regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
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+
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+ if (IS_ERR(grf)) {
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+ pr_warn("%s: Missing rockchip,grf property\n", __func__);
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+ return;
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+ }
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+}
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+
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+/**
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+ * rk_tsadcv3_initialize - initialize TASDC Controller.
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+ * (1) The tsadc control power sequence.
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+ *
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+ * (2) Set TSADC_V2_AUTO_PERIOD:
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+ * Configure the interleave between every two accessing of
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+ * TSADC in normal operation.
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+ *
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+ * (2) Set TSADCV2_AUTO_PERIOD_HT:
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+ * Configure the interleave between every two accessing of
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+ * TSADC after the temperature is higher than COM_SHUT or COM_INT.
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+ *
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+ * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
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+ * If the temperature is higher than COMP_INT or COMP_SHUT for
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+ * "debounce" times, TSADC controller will generate interrupt or TSHUT.
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+ */
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+static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
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+ enum tshut_polarity tshut_polarity)
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+{
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+ /* The tsadc control power sequence */
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+ if (IS_ERR(grf)) {
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+ /* Set interleave value to workround ic time sync issue */
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+ writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
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+ TSADCV2_USER_CON);
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+ } else {
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+ regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
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+ mdelay(10);
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+ regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
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+ udelay(100); /* The spec note says at least 15 us */
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+ regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
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+ regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
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+ udelay(200); /* The spec note says at least 90 us */
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+ }
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+
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+ if (tshut_polarity == TSHUT_HIGH_ACTIVE)
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+ writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
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+ regs + TSADCV2_AUTO_CON);
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+ else
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+ writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
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+ regs + TSADCV2_AUTO_CON);
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+
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+ writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
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+ writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
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+ regs + TSADCV2_HIGHT_INT_DEBOUNCE);
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+ writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
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+ regs + TSADCV2_AUTO_PERIOD_HT);
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+ writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
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+ regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
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}
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static void rk_tsadcv2_irq_ack(void __iomem *regs)
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@@ -636,7 +706,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
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.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
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.tshut_temp = 95000,
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- .initialize = rk_tsadcv2_initialize,
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+ .initialize = rk_tsadcv3_initialize,
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.irq_ack = rk_tsadcv3_irq_ack,
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.control = rk_tsadcv3_control,
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.get_temp = rk_tsadcv2_get_temp,
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@@ -768,6 +838,11 @@ static int rockchip_configure_from_dt(struct device *dev,
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return -EINVAL;
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}
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+ /* The tsadc wont to handle the error in here since some SoCs didn't
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+ * need this property.
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+ */
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+ thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
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+
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return 0;
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}
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@@ -888,7 +963,8 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
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goto err_disable_pclk;
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}
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- thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
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+ thermal->chip->initialize(thermal->grf, thermal->regs,
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+ thermal->tshut_polarity);
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for (i = 0; i < thermal->chip->chn_num; i++) {
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error = rockchip_thermal_register_sensor(pdev, thermal,
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@@ -986,7 +1062,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
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rockchip_thermal_reset_controller(thermal->reset);
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- thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
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+ thermal->chip->initialize(thermal->grf, thermal->regs,
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+ thermal->tshut_polarity);
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for (i = 0; i < thermal->chip->chn_num; i++) {
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int id = thermal->sensors[i].id;
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