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@@ -375,30 +375,26 @@ void __init early_print(const char *str, ...)
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static void __init cpuid_init_hwcaps(void)
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{
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- unsigned int divide_instrs, vmsa;
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+ int block;
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if (cpu_architecture() < CPU_ARCH_ARMv7)
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return;
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- divide_instrs = (read_cpuid_ext(CPUID_EXT_ISAR0) & 0x0f000000) >> 24;
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-
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- switch (divide_instrs) {
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- case 2:
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+ block = cpuid_feature_extract(CPUID_EXT_ISAR0, 24);
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+ if (block >= 2)
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elf_hwcap |= HWCAP_IDIVA;
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- case 1:
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+ if (block >= 1)
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elf_hwcap |= HWCAP_IDIVT;
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- }
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/* LPAE implies atomic ldrd/strd instructions */
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- vmsa = (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xf) >> 0;
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- if (vmsa >= 5)
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+ block = cpuid_feature_extract(CPUID_EXT_MMFR0, 0);
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+ if (block >= 5)
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elf_hwcap |= HWCAP_LPAE;
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}
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static void __init elf_hwcap_fixup(void)
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{
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unsigned id = read_cpuid_id();
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- unsigned sync_prim;
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/*
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* HWCAP_TLS is available only on 1136 r1p0 and later,
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@@ -419,9 +415,9 @@ static void __init elf_hwcap_fixup(void)
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* avoid advertising SWP; it may not be atomic with
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* multiprocessing cores.
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*/
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- sync_prim = ((read_cpuid_ext(CPUID_EXT_ISAR3) >> 8) & 0xf0) |
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- ((read_cpuid_ext(CPUID_EXT_ISAR4) >> 20) & 0x0f);
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- if (sync_prim >= 0x13)
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+ if (cpuid_feature_extract(CPUID_EXT_ISAR3, 12) > 1 ||
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+ (cpuid_feature_extract(CPUID_EXT_ISAR3, 12) == 1 &&
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+ cpuid_feature_extract(CPUID_EXT_ISAR3, 20) >= 3))
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elf_hwcap &= ~HWCAP_SWP;
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}
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