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kbuild: remove extra ifdef/endif of top Makefile

The GNU make's origin function know undefined variable well,
so the outer ifdef/endif conditional checking is unneeded.

From `info make` documentation, origin will return

  `undefined'
     if VARIABLE was never defined.
  `command line'
     if VARIABLE was defined on the command line.
   ...

Therefore, $(origin V) will get a value anyway, killing ifdef/endif is
viable and safe.

Furthermore, I've checked the minimal requirements from
Documentation/Changes is GNU make 3.79.1, and that version of GNU make
has support of origin function well already, so now it's safe to kill
the outer conditional checking, without upgrading the minimal
requirements.

Signed-off-by: Cheng Renquan <crq@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cheng Renquan há 16 anos atrás
pai
commit
b8b0618cf6
1 ficheiros alterados com 9 adições e 17 exclusões
  1. 9 17
      Makefile

+ 9 - 17
Makefile

@@ -35,10 +35,8 @@ MAKEFLAGS += -rR --no-print-directory
 # To put more focus on warnings, be less verbose as default
 # To put more focus on warnings, be less verbose as default
 # Use 'make V=1' to see the full commands
 # Use 'make V=1' to see the full commands
 
 
-ifdef V
-  ifeq ("$(origin V)", "command line")
-    KBUILD_VERBOSE = $(V)
-  endif
+ifeq ("$(origin V)", "command line")
+  KBUILD_VERBOSE = $(V)
 endif
 endif
 ifndef KBUILD_VERBOSE
 ifndef KBUILD_VERBOSE
   KBUILD_VERBOSE = 0
   KBUILD_VERBOSE = 0
@@ -54,10 +52,8 @@ endif
 # See the file "Documentation/sparse.txt" for more details, including
 # See the file "Documentation/sparse.txt" for more details, including
 # where to get the "sparse" utility.
 # where to get the "sparse" utility.
 
 
-ifdef C
-  ifeq ("$(origin C)", "command line")
-    KBUILD_CHECKSRC = $(C)
-  endif
+ifeq ("$(origin C)", "command line")
+  KBUILD_CHECKSRC = $(C)
 endif
 endif
 ifndef KBUILD_CHECKSRC
 ifndef KBUILD_CHECKSRC
   KBUILD_CHECKSRC = 0
   KBUILD_CHECKSRC = 0
@@ -69,12 +65,10 @@ endif
 ifdef SUBDIRS
 ifdef SUBDIRS
   KBUILD_EXTMOD ?= $(SUBDIRS)
   KBUILD_EXTMOD ?= $(SUBDIRS)
 endif
 endif
-ifdef M
-  ifeq ("$(origin M)", "command line")
-    KBUILD_EXTMOD := $(M)
-  endif
-endif
 
 
+ifeq ("$(origin M)", "command line")
+  KBUILD_EXTMOD := $(M)
+endif
 
 
 # kbuild supports saving output files in a separate directory.
 # kbuild supports saving output files in a separate directory.
 # To locate output files in a separate directory two syntaxes are supported.
 # To locate output files in a separate directory two syntaxes are supported.
@@ -98,10 +92,8 @@ ifeq ($(KBUILD_SRC),)
 
 
 # OK, Make called in directory where kernel src resides
 # OK, Make called in directory where kernel src resides
 # Do we want to locate output files in a separate directory?
 # Do we want to locate output files in a separate directory?
-ifdef O
-  ifeq ("$(origin O)", "command line")
-    KBUILD_OUTPUT := $(O)
-  endif
+ifeq ("$(origin O)", "command line")
+  KBUILD_OUTPUT := $(O)
 endif
 endif
 
 
 # That's our default target when none is given on the command line
 # That's our default target when none is given on the command line