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@@ -1,22 +1,40 @@
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Freescale i.MX General Power Controller
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=======================================
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-The i.MX6Q General Power Control (GPC) block contains DVFS load tracking
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-counters and Power Gating Control (PGC) for the CPU and PU (GPU/VPU) power
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-domains.
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+The i.MX6 General Power Control (GPC) block contains DVFS load tracking
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+counters and Power Gating Control (PGC).
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Required properties:
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- compatible: Should be "fsl,imx6q-gpc" or "fsl,imx6sl-gpc"
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- reg: should be register base and length as documented in the
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datasheet
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-- interrupts: Should contain GPC interrupt request 1
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-- pu-supply: Link to the LDO regulator powering the PU power domain
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-- clocks: Clock phandles to devices in the PU power domain that need
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- to be enabled during domain power-up for reset propagation.
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-- #power-domain-cells: Should be 1, see below:
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+- interrupts: Should contain one interrupt specifier for the GPC interrupt
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+- clocks: Must contain an entry for each entry in clock-names.
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+ See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.
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+- clock-names: Must include the following entries:
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+ - ipg
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-The gpc node is a power-controller as documented by the generic power domain
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-bindings in Documentation/devicetree/bindings/power/power_domain.txt.
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+The power domains are generic power domain providers as documented in
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+Documentation/devicetree/bindings/power/power_domain.txt. They are described as
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+subnodes of the power gating controller 'pgc' node of the GPC and should
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+contain the following:
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+
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+Required properties:
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+- reg: the DOMAIN_INDEX as used by the client devices to refer to this
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+ power domain
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+ The following DOMAIN_INDEX values are valid for i.MX6Q:
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+ ARM_DOMAIN 0
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+ PU_DOMAIN 1
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+ The following additional DOMAIN_INDEX value is valid for i.MX6SL:
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+ DISPLAY_DOMAIN 2
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+
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+- #power-domain-cells: Should be 0
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+
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+Optional properties:
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+- clocks: a number of phandles to clocks that need to be enabled during domain
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+ power-up sequencing to ensure reset propagation into devices located inside
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+ this power domain
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+- power-supply: a phandle to the regulator powering this domain
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Example:
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@@ -25,14 +43,29 @@ Example:
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reg = <0x020dc000 0x4000>;
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interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
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<0 90 IRQ_TYPE_LEVEL_HIGH>;
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- pu-supply = <®_pu>;
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- clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
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- <&clks IMX6QDL_CLK_GPU3D_SHADER>,
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- <&clks IMX6QDL_CLK_GPU2D_CORE>,
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- <&clks IMX6QDL_CLK_GPU2D_AXI>,
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- <&clks IMX6QDL_CLK_OPENVG_AXI>,
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- <&clks IMX6QDL_CLK_VPU_AXI>;
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- #power-domain-cells = <1>;
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+ clocks = <&clks IMX6QDL_CLK_IPG>;
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+ clock-names = "ipg";
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+
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+ pgc {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ power-domain@0 {
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+ reg = <0>;
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+ #power-domain-cells = <0>;
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+ };
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+ pd_pu: power-domain@1 {
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+ reg = <1>;
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+ #power-domain-cells = <0>;
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+ power-supply = <®_pu>;
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+ clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
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+ <&clks IMX6QDL_CLK_GPU3D_SHADER>,
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+ <&clks IMX6QDL_CLK_GPU2D_CORE>,
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+ <&clks IMX6QDL_CLK_GPU2D_AXI>,
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+ <&clks IMX6QDL_CLK_OPENVG_AXI>,
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+ <&clks IMX6QDL_CLK_VPU_AXI>;
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+ };
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+ };
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};
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@@ -40,20 +73,13 @@ Specifying power domain for IP modules
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======================================
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IP cores belonging to a power domain should contain a 'power-domains' property
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-that is a phandle pointing to the gpc device node and a DOMAIN_INDEX specifying
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-the power domain the device belongs to.
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+that is a phandle pointing to the power domain the device belongs to.
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Example of a device that is part of the PU power domain:
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vpu: vpu@02040000 {
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reg = <0x02040000 0x3c000>;
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/* ... */
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- power-domains = <&gpc 1>;
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+ power-domains = <&pd_pu>;
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/* ... */
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};
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-
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-The following DOMAIN_INDEX values are valid for i.MX6Q:
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-ARM_DOMAIN 0
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-PU_DOMAIN 1
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-The following additional DOMAIN_INDEX value is valid for i.MX6SL:
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-DISPLAY_DOMAIN 2
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