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@@ -124,6 +124,13 @@ static inline bool pnv_pci_is_m64(struct pnv_phb *phb, struct resource *r)
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r->start < (phb->ioda.m64_base + phb->ioda.m64_size));
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r->start < (phb->ioda.m64_base + phb->ioda.m64_size));
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}
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}
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+static inline bool pnv_pci_is_m64_flags(unsigned long resource_flags)
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+{
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+ unsigned long flags = (IORESOURCE_MEM_64 | IORESOURCE_PREFETCH);
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+
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+ return (resource_flags & flags) == flags;
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+}
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+
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static struct pnv_ioda_pe *pnv_ioda_init_pe(struct pnv_phb *phb, int pe_no)
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static struct pnv_ioda_pe *pnv_ioda_init_pe(struct pnv_phb *phb, int pe_no)
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{
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{
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phb->ioda.pe_array[pe_no].phb = phb;
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phb->ioda.pe_array[pe_no].phb = phb;
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@@ -2871,7 +2878,7 @@ static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev)
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res = &pdev->resource[i + PCI_IOV_RESOURCES];
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res = &pdev->resource[i + PCI_IOV_RESOURCES];
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if (!res->flags || res->parent)
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if (!res->flags || res->parent)
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continue;
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continue;
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- if (!pnv_pci_is_m64(phb, res)) {
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+ if (!pnv_pci_is_m64_flags(res->flags)) {
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dev_warn(&pdev->dev, "Don't support SR-IOV with"
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dev_warn(&pdev->dev, "Don't support SR-IOV with"
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" non M64 VF BAR%d: %pR. \n",
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" non M64 VF BAR%d: %pR. \n",
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i, res);
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i, res);
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@@ -3096,7 +3103,7 @@ static resource_size_t pnv_pci_window_alignment(struct pci_bus *bus,
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* alignment for any 64-bit resource, PCIe doesn't care and
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* alignment for any 64-bit resource, PCIe doesn't care and
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* bridges only do 64-bit prefetchable anyway.
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* bridges only do 64-bit prefetchable anyway.
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*/
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*/
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- if (phb->ioda.m64_segsize && (type & IORESOURCE_MEM_64))
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+ if (phb->ioda.m64_segsize && pnv_pci_is_m64_flags(type))
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return phb->ioda.m64_segsize;
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return phb->ioda.m64_segsize;
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if (type & IORESOURCE_MEM)
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if (type & IORESOURCE_MEM)
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return phb->ioda.m32_segsize;
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return phb->ioda.m32_segsize;
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