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@@ -0,0 +1,793 @@
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+/*
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+ * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
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+ *
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+ * This software is licensed under the terms of the GNU General Public
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+ * License version 2, as published by the Free Software Foundation, and
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+ * may be copied, distributed, and modified under those terms.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#if defined(CONFIG_SERIAL_SPRD_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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+#define SUPPORT_SYSRQ
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+#endif
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+
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+#include <linux/clk.h>
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+#include <linux/console.h>
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+#include <linux/delay.h>
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+#include <linux/io.h>
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+#include <linux/ioport.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/platform_device.h>
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+#include <linux/serial_core.h>
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+#include <linux/serial.h>
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+#include <linux/slab.h>
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+#include <linux/tty.h>
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+#include <linux/tty_flip.h>
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+
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+/* device name */
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+#define UART_NR_MAX 8
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+#define SPRD_TTY_NAME "ttyS"
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+#define SPRD_FIFO_SIZE 128
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+#define SPRD_DEF_RATE 26000000
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+#define SPRD_BAUD_IO_LIMIT 3000000
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+#define SPRD_TIMEOUT 256
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+
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+/* the offset of serial registers and BITs for them */
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+/* data registers */
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+#define SPRD_TXD 0x0000
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+#define SPRD_RXD 0x0004
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+
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+/* line status register and its BITs */
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+#define SPRD_LSR 0x0008
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+#define SPRD_LSR_OE BIT(4)
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+#define SPRD_LSR_FE BIT(3)
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+#define SPRD_LSR_PE BIT(2)
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+#define SPRD_LSR_BI BIT(7)
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+#define SPRD_LSR_TX_OVER BIT(15)
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+
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+/* data number in TX and RX fifo */
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+#define SPRD_STS1 0x000C
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+
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+/* interrupt enable register and its BITs */
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+#define SPRD_IEN 0x0010
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+#define SPRD_IEN_RX_FULL BIT(0)
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+#define SPRD_IEN_TX_EMPTY BIT(1)
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+#define SPRD_IEN_BREAK_DETECT BIT(7)
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+#define SPRD_IEN_TIMEOUT BIT(13)
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+
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+/* interrupt clear register */
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+#define SPRD_ICLR 0x0014
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+
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+/* line control register */
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+#define SPRD_LCR 0x0018
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+#define SPRD_LCR_STOP_1BIT 0x10
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+#define SPRD_LCR_STOP_2BIT 0x30
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+#define SPRD_LCR_DATA_LEN (BIT(2) | BIT(3))
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+#define SPRD_LCR_DATA_LEN5 0x0
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+#define SPRD_LCR_DATA_LEN6 0x4
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+#define SPRD_LCR_DATA_LEN7 0x8
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+#define SPRD_LCR_DATA_LEN8 0xc
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+#define SPRD_LCR_PARITY (BIT(0) | BIT(1))
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+#define SPRD_LCR_PARITY_EN 0x2
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+#define SPRD_LCR_EVEN_PAR 0x0
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+#define SPRD_LCR_ODD_PAR 0x1
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+
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+/* control register 1 */
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+#define SPRD_CTL1 0x001C
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+#define RX_HW_FLOW_CTL_THLD BIT(6)
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+#define RX_HW_FLOW_CTL_EN BIT(7)
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+#define TX_HW_FLOW_CTL_EN BIT(8)
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+#define RX_TOUT_THLD_DEF 0x3E00
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+#define RX_HFC_THLD_DEF 0x40
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+
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+/* fifo threshold register */
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+#define SPRD_CTL2 0x0020
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+#define THLD_TX_EMPTY 0x40
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+#define THLD_RX_FULL 0x40
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+
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+/* config baud rate register */
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+#define SPRD_CLKD0 0x0024
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+#define SPRD_CLKD1 0x0028
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+
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+/* interrupt mask status register */
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+#define SPRD_IMSR 0x002C
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+#define SPRD_IMSR_RX_FIFO_FULL BIT(0)
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+#define SPRD_IMSR_TX_FIFO_EMPTY BIT(1)
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+#define SPRD_IMSR_BREAK_DETECT BIT(7)
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+#define SPRD_IMSR_TIMEOUT BIT(13)
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+
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+struct reg_backup {
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+ u32 ien;
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+ u32 ctrl0;
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+ u32 ctrl1;
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+ u32 ctrl2;
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+ u32 clkd0;
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+ u32 clkd1;
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+ u32 dspwait;
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+};
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+
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+struct sprd_uart_port {
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+ struct uart_port port;
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+ struct reg_backup reg_bak;
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+ char name[16];
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+};
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+
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+static struct sprd_uart_port *sprd_port[UART_NR_MAX];
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+static int sprd_ports_num;
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+
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+static inline unsigned int serial_in(struct uart_port *port, int offset)
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+{
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+ return readl_relaxed(port->membase + offset);
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+}
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+
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+static inline void serial_out(struct uart_port *port, int offset, int value)
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+{
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+ writel_relaxed(value, port->membase + offset);
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+}
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+
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+static unsigned int sprd_tx_empty(struct uart_port *port)
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+{
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+ if (serial_in(port, SPRD_STS1) & 0xff00)
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+ return 0;
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+ else
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+ return TIOCSER_TEMT;
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+}
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+
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+static unsigned int sprd_get_mctrl(struct uart_port *port)
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+{
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+ return TIOCM_DSR | TIOCM_CTS;
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+}
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+
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+static void sprd_set_mctrl(struct uart_port *port, unsigned int mctrl)
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+{
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+ /* nothing to do */
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+}
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+
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+static void sprd_stop_tx(struct uart_port *port)
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+{
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+ unsigned int ien, iclr;
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+
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+ iclr = serial_in(port, SPRD_ICLR);
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+ ien = serial_in(port, SPRD_IEN);
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+
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+ iclr |= SPRD_IEN_TX_EMPTY;
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+ ien &= ~SPRD_IEN_TX_EMPTY;
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+
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+ serial_out(port, SPRD_ICLR, iclr);
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+ serial_out(port, SPRD_IEN, ien);
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+}
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+
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+static void sprd_start_tx(struct uart_port *port)
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+{
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+ unsigned int ien;
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+
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+ ien = serial_in(port, SPRD_IEN);
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+ if (!(ien & SPRD_IEN_TX_EMPTY)) {
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+ ien |= SPRD_IEN_TX_EMPTY;
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+ serial_out(port, SPRD_IEN, ien);
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+ }
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+}
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+
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+static void sprd_stop_rx(struct uart_port *port)
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+{
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+ unsigned int ien, iclr;
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+
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+ iclr = serial_in(port, SPRD_ICLR);
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+ ien = serial_in(port, SPRD_IEN);
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+
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+ ien &= ~(SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT);
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+ iclr |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT;
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+
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+ serial_out(port, SPRD_IEN, ien);
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+ serial_out(port, SPRD_ICLR, iclr);
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+}
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+
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+/* The Sprd serial does not support this function. */
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+static void sprd_break_ctl(struct uart_port *port, int break_state)
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+{
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+ /* nothing to do */
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+}
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+
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+static int handle_lsr_errors(struct uart_port *port,
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+ unsigned int *flag,
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+ unsigned int *lsr)
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+{
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+ int ret = 0;
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+
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+ /* statistics */
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+ if (*lsr & SPRD_LSR_BI) {
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+ *lsr &= ~(SPRD_LSR_FE | SPRD_LSR_PE);
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+ port->icount.brk++;
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+ ret = uart_handle_break(port);
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+ if (ret)
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+ return ret;
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+ } else if (*lsr & SPRD_LSR_PE)
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+ port->icount.parity++;
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+ else if (*lsr & SPRD_LSR_FE)
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+ port->icount.frame++;
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+ if (*lsr & SPRD_LSR_OE)
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+ port->icount.overrun++;
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+
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+ /* mask off conditions which should be ignored */
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+ *lsr &= port->read_status_mask;
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+ if (*lsr & SPRD_LSR_BI)
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+ *flag = TTY_BREAK;
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+ else if (*lsr & SPRD_LSR_PE)
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+ *flag = TTY_PARITY;
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+ else if (*lsr & SPRD_LSR_FE)
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+ *flag = TTY_FRAME;
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+
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+ return ret;
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+}
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+
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+static inline void sprd_rx(struct uart_port *port)
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+{
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+ struct tty_port *tty = &port->state->port;
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+ unsigned int ch, flag, lsr, max_count = SPRD_TIMEOUT;
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+
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+ while ((serial_in(port, SPRD_STS1) & 0x00ff) && max_count--) {
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+ lsr = serial_in(port, SPRD_LSR);
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+ ch = serial_in(port, SPRD_RXD);
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+ flag = TTY_NORMAL;
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+ port->icount.rx++;
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+
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+ if (lsr & (SPRD_LSR_BI | SPRD_LSR_PE |
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+ SPRD_LSR_FE | SPRD_LSR_OE))
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+ if (handle_lsr_errors(port, &lsr, &flag))
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+ continue;
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+ if (uart_handle_sysrq_char(port, ch))
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+ continue;
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+
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+ uart_insert_char(port, lsr, SPRD_LSR_OE, ch, flag);
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+ }
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+
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+ tty_flip_buffer_push(tty);
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+}
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+
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+static inline void sprd_tx(struct uart_port *port)
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+{
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+ struct circ_buf *xmit = &port->state->xmit;
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+ int count;
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+
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+ if (port->x_char) {
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+ serial_out(port, SPRD_TXD, port->x_char);
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+ port->icount.tx++;
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+ port->x_char = 0;
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+ return;
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+ }
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+
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+ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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+ sprd_stop_tx(port);
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+ return;
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+ }
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+
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+ count = THLD_TX_EMPTY;
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+ do {
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+ serial_out(port, SPRD_TXD, xmit->buf[xmit->tail]);
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+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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+ port->icount.tx++;
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+ if (uart_circ_empty(xmit))
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+ break;
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+ } while (--count > 0);
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+
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+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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+ uart_write_wakeup(port);
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+
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+ if (uart_circ_empty(xmit))
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+ sprd_stop_tx(port);
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+}
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+
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+/* this handles the interrupt from one port */
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+static irqreturn_t sprd_handle_irq(int irq, void *dev_id)
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+{
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+ struct uart_port *port = dev_id;
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+ unsigned int ims;
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+
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+ spin_lock(&port->lock);
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+
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+ ims = serial_in(port, SPRD_IMSR);
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+
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+ if (!ims)
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+ return IRQ_NONE;
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+
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+ serial_out(port, SPRD_ICLR, ~0);
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+
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+ if (ims & (SPRD_IMSR_RX_FIFO_FULL |
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+ SPRD_IMSR_BREAK_DETECT | SPRD_IMSR_TIMEOUT))
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+ sprd_rx(port);
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+
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+ if (ims & SPRD_IMSR_TX_FIFO_EMPTY)
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+ sprd_tx(port);
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+
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+ spin_unlock(&port->lock);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static int sprd_startup(struct uart_port *port)
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+{
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+ int ret = 0;
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+ unsigned int ien, fc;
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+ unsigned int timeout;
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+ struct sprd_uart_port *sp;
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+ unsigned long flags;
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+
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+ serial_out(port, SPRD_CTL2, ((THLD_TX_EMPTY << 8) | THLD_RX_FULL));
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+
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+ /* clear rx fifo */
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+ timeout = SPRD_TIMEOUT;
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+ while (timeout-- && serial_in(port, SPRD_STS1) & 0x00ff)
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+ serial_in(port, SPRD_RXD);
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+
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+ /* clear tx fifo */
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+ timeout = SPRD_TIMEOUT;
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+ while (timeout-- && serial_in(port, SPRD_STS1) & 0xff00)
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+ cpu_relax();
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+
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+ /* clear interrupt */
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+ serial_out(port, SPRD_IEN, 0);
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+ serial_out(port, SPRD_ICLR, ~0);
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+
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+ /* allocate irq */
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+ sp = container_of(port, struct sprd_uart_port, port);
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+ snprintf(sp->name, sizeof(sp->name), "sprd_serial%d", port->line);
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+ ret = devm_request_irq(port->dev, port->irq, sprd_handle_irq,
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+ IRQF_SHARED, sp->name, port);
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+ if (ret) {
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+ dev_err(port->dev, "fail to request serial irq %d, ret=%d\n",
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+ port->irq, ret);
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+ return ret;
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+ }
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+ fc = serial_in(port, SPRD_CTL1);
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|
|
+ fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
|
|
|
|
+ serial_out(port, SPRD_CTL1, fc);
|
|
|
|
+
|
|
|
|
+ /* enable interrupt */
|
|
|
|
+ spin_lock_irqsave(&port->lock, flags);
|
|
|
|
+ ien = serial_in(port, SPRD_IEN);
|
|
|
|
+ ien |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT | SPRD_IEN_TIMEOUT;
|
|
|
|
+ serial_out(port, SPRD_IEN, ien);
|
|
|
|
+ spin_unlock_irqrestore(&port->lock, flags);
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void sprd_shutdown(struct uart_port *port)
|
|
|
|
+{
|
|
|
|
+ serial_out(port, SPRD_IEN, 0);
|
|
|
|
+ serial_out(port, SPRD_ICLR, ~0);
|
|
|
|
+ devm_free_irq(port->dev, port->irq, port);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void sprd_set_termios(struct uart_port *port,
|
|
|
|
+ struct ktermios *termios,
|
|
|
|
+ struct ktermios *old)
|
|
|
|
+{
|
|
|
|
+ unsigned int baud, quot;
|
|
|
|
+ unsigned int lcr = 0, fc;
|
|
|
|
+ unsigned long flags;
|
|
|
|
+
|
|
|
|
+ /* ask the core to calculate the divisor for us */
|
|
|
|
+ baud = uart_get_baud_rate(port, termios, old, 0, SPRD_BAUD_IO_LIMIT);
|
|
|
|
+
|
|
|
|
+ quot = (unsigned int)((port->uartclk + baud / 2) / baud);
|
|
|
|
+
|
|
|
|
+ /* set data length */
|
|
|
|
+ switch (termios->c_cflag & CSIZE) {
|
|
|
|
+ case CS5:
|
|
|
|
+ lcr |= SPRD_LCR_DATA_LEN5;
|
|
|
|
+ break;
|
|
|
|
+ case CS6:
|
|
|
|
+ lcr |= SPRD_LCR_DATA_LEN6;
|
|
|
|
+ break;
|
|
|
|
+ case CS7:
|
|
|
|
+ lcr |= SPRD_LCR_DATA_LEN7;
|
|
|
|
+ break;
|
|
|
|
+ case CS8:
|
|
|
|
+ default:
|
|
|
|
+ lcr |= SPRD_LCR_DATA_LEN8;
|
|
|
|
+ break;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* calculate stop bits */
|
|
|
|
+ lcr &= ~(SPRD_LCR_STOP_1BIT | SPRD_LCR_STOP_2BIT);
|
|
|
|
+ if (termios->c_cflag & CSTOPB)
|
|
|
|
+ lcr |= SPRD_LCR_STOP_2BIT;
|
|
|
|
+ else
|
|
|
|
+ lcr |= SPRD_LCR_STOP_1BIT;
|
|
|
|
+
|
|
|
|
+ /* calculate parity */
|
|
|
|
+ lcr &= ~SPRD_LCR_PARITY;
|
|
|
|
+ termios->c_cflag &= ~CMSPAR; /* no support mark/space */
|
|
|
|
+ if (termios->c_cflag & PARENB) {
|
|
|
|
+ lcr |= SPRD_LCR_PARITY_EN;
|
|
|
|
+ if (termios->c_cflag & PARODD)
|
|
|
|
+ lcr |= SPRD_LCR_ODD_PAR;
|
|
|
|
+ else
|
|
|
|
+ lcr |= SPRD_LCR_EVEN_PAR;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ spin_lock_irqsave(&port->lock, flags);
|
|
|
|
+
|
|
|
|
+ /* update the per-port timeout */
|
|
|
|
+ uart_update_timeout(port, termios->c_cflag, baud);
|
|
|
|
+
|
|
|
|
+ port->read_status_mask = SPRD_LSR_OE;
|
|
|
|
+ if (termios->c_iflag & INPCK)
|
|
|
|
+ port->read_status_mask |= SPRD_LSR_FE | SPRD_LSR_PE;
|
|
|
|
+ if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
|
|
|
|
+ port->read_status_mask |= SPRD_LSR_BI;
|
|
|
|
+
|
|
|
|
+ /* characters to ignore */
|
|
|
|
+ port->ignore_status_mask = 0;
|
|
|
|
+ if (termios->c_iflag & IGNPAR)
|
|
|
|
+ port->ignore_status_mask |= SPRD_LSR_PE | SPRD_LSR_FE;
|
|
|
|
+ if (termios->c_iflag & IGNBRK) {
|
|
|
|
+ port->ignore_status_mask |= SPRD_LSR_BI;
|
|
|
|
+ /*
|
|
|
|
+ * If we're ignoring parity and break indicators,
|
|
|
|
+ * ignore overruns too (for real raw support).
|
|
|
|
+ */
|
|
|
|
+ if (termios->c_iflag & IGNPAR)
|
|
|
|
+ port->ignore_status_mask |= SPRD_LSR_OE;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* flow control */
|
|
|
|
+ fc = serial_in(port, SPRD_CTL1);
|
|
|
|
+ fc &= ~(RX_HW_FLOW_CTL_THLD | RX_HW_FLOW_CTL_EN | TX_HW_FLOW_CTL_EN);
|
|
|
|
+ if (termios->c_cflag & CRTSCTS) {
|
|
|
|
+ fc |= RX_HW_FLOW_CTL_THLD;
|
|
|
|
+ fc |= RX_HW_FLOW_CTL_EN;
|
|
|
|
+ fc |= TX_HW_FLOW_CTL_EN;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* clock divider bit0~bit15 */
|
|
|
|
+ serial_out(port, SPRD_CLKD0, quot & 0xffff);
|
|
|
|
+
|
|
|
|
+ /* clock divider bit16~bit20 */
|
|
|
|
+ serial_out(port, SPRD_CLKD1, (quot & 0x1f0000) >> 16);
|
|
|
|
+ serial_out(port, SPRD_LCR, lcr);
|
|
|
|
+ fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
|
|
|
|
+ serial_out(port, SPRD_CTL1, fc);
|
|
|
|
+
|
|
|
|
+ spin_unlock_irqrestore(&port->lock, flags);
|
|
|
|
+
|
|
|
|
+ /* Don't rewrite B0 */
|
|
|
|
+ if (tty_termios_baud_rate(termios))
|
|
|
|
+ tty_termios_encode_baud_rate(termios, baud, baud);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static const char *sprd_type(struct uart_port *port)
|
|
|
|
+{
|
|
|
|
+ return "SPX";
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void sprd_release_port(struct uart_port *port)
|
|
|
|
+{
|
|
|
|
+ /* nothing to do */
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int sprd_request_port(struct uart_port *port)
|
|
|
|
+{
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void sprd_config_port(struct uart_port *port, int flags)
|
|
|
|
+{
|
|
|
|
+ if (flags & UART_CONFIG_TYPE)
|
|
|
|
+ port->type = PORT_SPRD;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int sprd_verify_port(struct uart_port *port,
|
|
|
|
+ struct serial_struct *ser)
|
|
|
|
+{
|
|
|
|
+ if (ser->type != PORT_SPRD)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ if (port->irq != ser->irq)
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static struct uart_ops serial_sprd_ops = {
|
|
|
|
+ .tx_empty = sprd_tx_empty,
|
|
|
|
+ .get_mctrl = sprd_get_mctrl,
|
|
|
|
+ .set_mctrl = sprd_set_mctrl,
|
|
|
|
+ .stop_tx = sprd_stop_tx,
|
|
|
|
+ .start_tx = sprd_start_tx,
|
|
|
|
+ .stop_rx = sprd_stop_rx,
|
|
|
|
+ .break_ctl = sprd_break_ctl,
|
|
|
|
+ .startup = sprd_startup,
|
|
|
|
+ .shutdown = sprd_shutdown,
|
|
|
|
+ .set_termios = sprd_set_termios,
|
|
|
|
+ .type = sprd_type,
|
|
|
|
+ .release_port = sprd_release_port,
|
|
|
|
+ .request_port = sprd_request_port,
|
|
|
|
+ .config_port = sprd_config_port,
|
|
|
|
+ .verify_port = sprd_verify_port,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+#ifdef CONFIG_SERIAL_SPRD_CONSOLE
|
|
|
|
+static inline void wait_for_xmitr(struct uart_port *port)
|
|
|
|
+{
|
|
|
|
+ unsigned int status, tmout = 10000;
|
|
|
|
+
|
|
|
|
+ /* wait up to 10ms for the character(s) to be sent */
|
|
|
|
+ do {
|
|
|
|
+ status = serial_in(port, SPRD_STS1);
|
|
|
|
+ if (--tmout == 0)
|
|
|
|
+ break;
|
|
|
|
+ udelay(1);
|
|
|
|
+ } while (status & 0xff00);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void sprd_console_putchar(struct uart_port *port, int ch)
|
|
|
|
+{
|
|
|
|
+ wait_for_xmitr(port);
|
|
|
|
+ serial_out(port, SPRD_TXD, ch);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void sprd_console_write(struct console *co, const char *s,
|
|
|
|
+ unsigned int count)
|
|
|
|
+{
|
|
|
|
+ struct uart_port *port = &sprd_port[co->index]->port;
|
|
|
|
+ int locked = 1;
|
|
|
|
+ unsigned long flags;
|
|
|
|
+
|
|
|
|
+ if (port->sysrq)
|
|
|
|
+ locked = 0;
|
|
|
|
+ else if (oops_in_progress)
|
|
|
|
+ locked = spin_trylock_irqsave(&port->lock, flags);
|
|
|
|
+ else
|
|
|
|
+ spin_lock_irqsave(&port->lock, flags);
|
|
|
|
+
|
|
|
|
+ uart_console_write(port, s, count, sprd_console_putchar);
|
|
|
|
+
|
|
|
|
+ /* wait for transmitter to become empty */
|
|
|
|
+ wait_for_xmitr(port);
|
|
|
|
+
|
|
|
|
+ if (locked)
|
|
|
|
+ spin_unlock_irqrestore(&port->lock, flags);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int __init sprd_console_setup(struct console *co, char *options)
|
|
|
|
+{
|
|
|
|
+ struct uart_port *port;
|
|
|
|
+ int baud = 115200;
|
|
|
|
+ int bits = 8;
|
|
|
|
+ int parity = 'n';
|
|
|
|
+ int flow = 'n';
|
|
|
|
+
|
|
|
|
+ if (co->index >= UART_NR_MAX || co->index < 0)
|
|
|
|
+ co->index = 0;
|
|
|
|
+
|
|
|
|
+ port = &sprd_port[co->index]->port;
|
|
|
|
+ if (port == NULL) {
|
|
|
|
+ pr_info("serial port %d not yet initialized\n", co->index);
|
|
|
|
+ return -ENODEV;
|
|
|
|
+ }
|
|
|
|
+ if (options)
|
|
|
|
+ uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
+
|
|
|
|
+ return uart_set_options(port, co, baud, parity, bits, flow);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static struct uart_driver sprd_uart_driver;
|
|
|
|
+static struct console sprd_console = {
|
|
|
|
+ .name = SPRD_TTY_NAME,
|
|
|
|
+ .write = sprd_console_write,
|
|
|
|
+ .device = uart_console_device,
|
|
|
|
+ .setup = sprd_console_setup,
|
|
|
|
+ .flags = CON_PRINTBUFFER,
|
|
|
|
+ .index = -1,
|
|
|
|
+ .data = &sprd_uart_driver,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+#define SPRD_CONSOLE (&sprd_console)
|
|
|
|
+
|
|
|
|
+/* Support for earlycon */
|
|
|
|
+static void sprd_putc(struct uart_port *port, int c)
|
|
|
|
+{
|
|
|
|
+ unsigned int timeout = SPRD_TIMEOUT;
|
|
|
|
+
|
|
|
|
+ while (timeout-- &&
|
|
|
|
+ !(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER))
|
|
|
|
+ cpu_relax();
|
|
|
|
+
|
|
|
|
+ writeb(c, port->membase + SPRD_TXD);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static void sprd_early_write(struct console *con, const char *s,
|
|
|
|
+ unsigned n)
|
|
|
|
+{
|
|
|
|
+ struct earlycon_device *dev = con->data;
|
|
|
|
+
|
|
|
|
+ uart_console_write(&dev->port, s, n, sprd_putc);
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int __init sprd_early_console_setup(
|
|
|
|
+ struct earlycon_device *device,
|
|
|
|
+ const char *opt)
|
|
|
|
+{
|
|
|
|
+ if (!device->port.membase)
|
|
|
|
+ return -ENODEV;
|
|
|
|
+
|
|
|
|
+ device->con->write = sprd_early_write;
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+EARLYCON_DECLARE(sprd_serial, sprd_early_console_setup);
|
|
|
|
+OF_EARLYCON_DECLARE(sprd_serial, "sprd,sc9836-uart",
|
|
|
|
+ sprd_early_console_setup);
|
|
|
|
+
|
|
|
|
+#else /* !CONFIG_SERIAL_SPRD_CONSOLE */
|
|
|
|
+#define SPRD_CONSOLE NULL
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+static struct uart_driver sprd_uart_driver = {
|
|
|
|
+ .owner = THIS_MODULE,
|
|
|
|
+ .driver_name = "sprd_serial",
|
|
|
|
+ .dev_name = SPRD_TTY_NAME,
|
|
|
|
+ .major = 0,
|
|
|
|
+ .minor = 0,
|
|
|
|
+ .nr = UART_NR_MAX,
|
|
|
|
+ .cons = SPRD_CONSOLE,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static int sprd_probe_dt_alias(int index, struct device *dev)
|
|
|
|
+{
|
|
|
|
+ struct device_node *np;
|
|
|
|
+ int ret = index;
|
|
|
|
+
|
|
|
|
+ if (!IS_ENABLED(CONFIG_OF))
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ np = dev->of_node;
|
|
|
|
+ if (!np)
|
|
|
|
+ return ret;
|
|
|
|
+
|
|
|
|
+ ret = of_alias_get_id(np, "serial");
|
|
|
|
+ if (IS_ERR_VALUE(ret))
|
|
|
|
+ ret = index;
|
|
|
|
+ else if (ret >= ARRAY_SIZE(sprd_port) || sprd_port[ret] != NULL) {
|
|
|
|
+ dev_warn(dev, "requested serial port %d not available.\n", ret);
|
|
|
|
+ ret = index;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ return ret;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int sprd_remove(struct platform_device *dev)
|
|
|
|
+{
|
|
|
|
+ struct sprd_uart_port *sup = platform_get_drvdata(dev);
|
|
|
|
+
|
|
|
|
+ if (sup) {
|
|
|
|
+ uart_remove_one_port(&sprd_uart_driver, &sup->port);
|
|
|
|
+ sprd_port[sup->port.line] = NULL;
|
|
|
|
+ sprd_ports_num--;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (!sprd_ports_num)
|
|
|
|
+ uart_unregister_driver(&sprd_uart_driver);
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int sprd_probe(struct platform_device *pdev)
|
|
|
|
+{
|
|
|
|
+ struct resource *res;
|
|
|
|
+ struct uart_port *up;
|
|
|
|
+ struct clk *clk;
|
|
|
|
+ int irq;
|
|
|
|
+ int index;
|
|
|
|
+ int ret;
|
|
|
|
+
|
|
|
|
+ for (index = 0; index < ARRAY_SIZE(sprd_port); index++)
|
|
|
|
+ if (sprd_port[index] == NULL)
|
|
|
|
+ break;
|
|
|
|
+
|
|
|
|
+ if (index == ARRAY_SIZE(sprd_port))
|
|
|
|
+ return -EBUSY;
|
|
|
|
+
|
|
|
|
+ index = sprd_probe_dt_alias(index, &pdev->dev);
|
|
|
|
+
|
|
|
|
+ sprd_port[index] = devm_kzalloc(&pdev->dev,
|
|
|
|
+ sizeof(*sprd_port[index]), GFP_KERNEL);
|
|
|
|
+ if (!sprd_port[index])
|
|
|
|
+ return -ENOMEM;
|
|
|
|
+
|
|
|
|
+ up = &sprd_port[index]->port;
|
|
|
|
+ up->dev = &pdev->dev;
|
|
|
|
+ up->line = index;
|
|
|
|
+ up->type = PORT_SPRD;
|
|
|
|
+ up->iotype = SERIAL_IO_PORT;
|
|
|
|
+ up->uartclk = SPRD_DEF_RATE;
|
|
|
|
+ up->fifosize = SPRD_FIFO_SIZE;
|
|
|
|
+ up->ops = &serial_sprd_ops;
|
|
|
|
+ up->flags = UPF_BOOT_AUTOCONF;
|
|
|
|
+
|
|
|
|
+ clk = devm_clk_get(&pdev->dev, NULL);
|
|
|
|
+ if (!IS_ERR(clk))
|
|
|
|
+ up->uartclk = clk_get_rate(clk);
|
|
|
|
+
|
|
|
|
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
+ if (!res) {
|
|
|
|
+ dev_err(&pdev->dev, "not provide mem resource\n");
|
|
|
|
+ return -ENODEV;
|
|
|
|
+ }
|
|
|
|
+ up->mapbase = res->start;
|
|
|
|
+ up->membase = devm_ioremap_resource(&pdev->dev, res);
|
|
|
|
+ if (IS_ERR(up->membase))
|
|
|
|
+ return PTR_ERR(up->membase);
|
|
|
|
+
|
|
|
|
+ irq = platform_get_irq(pdev, 0);
|
|
|
|
+ if (irq < 0) {
|
|
|
|
+ dev_err(&pdev->dev, "not provide irq resource\n");
|
|
|
|
+ return -ENODEV;
|
|
|
|
+ }
|
|
|
|
+ up->irq = irq;
|
|
|
|
+
|
|
|
|
+ if (!sprd_ports_num) {
|
|
|
|
+ ret = uart_register_driver(&sprd_uart_driver);
|
|
|
|
+ if (ret < 0) {
|
|
|
|
+ pr_err("Failed to register SPRD-UART driver\n");
|
|
|
|
+ return ret;
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+ sprd_ports_num++;
|
|
|
|
+
|
|
|
|
+ ret = uart_add_one_port(&sprd_uart_driver, up);
|
|
|
|
+ if (ret) {
|
|
|
|
+ sprd_port[index] = NULL;
|
|
|
|
+ sprd_remove(pdev);
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ platform_set_drvdata(pdev, up);
|
|
|
|
+
|
|
|
|
+ return ret;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int sprd_suspend(struct device *dev)
|
|
|
|
+{
|
|
|
|
+ struct sprd_uart_port *sup = dev_get_drvdata(dev);
|
|
|
|
+
|
|
|
|
+ uart_suspend_port(&sprd_uart_driver, &sup->port);
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int sprd_resume(struct device *dev)
|
|
|
|
+{
|
|
|
|
+ struct sprd_uart_port *sup = dev_get_drvdata(dev);
|
|
|
|
+
|
|
|
|
+ uart_resume_port(&sprd_uart_driver, &sup->port);
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static SIMPLE_DEV_PM_OPS(sprd_pm_ops, sprd_suspend, sprd_resume);
|
|
|
|
+
|
|
|
|
+static const struct of_device_id serial_ids[] = {
|
|
|
|
+ {.compatible = "sprd,sc9836-uart",},
|
|
|
|
+ {}
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct platform_driver sprd_platform_driver = {
|
|
|
|
+ .probe = sprd_probe,
|
|
|
|
+ .remove = sprd_remove,
|
|
|
|
+ .driver = {
|
|
|
|
+ .name = "sprd_serial",
|
|
|
|
+ .of_match_table = of_match_ptr(serial_ids),
|
|
|
|
+ .pm = &sprd_pm_ops,
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+module_platform_driver(sprd_platform_driver);
|
|
|
|
+
|
|
|
|
+MODULE_LICENSE("GPL v2");
|
|
|
|
+MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");
|