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@@ -215,6 +215,7 @@ enum {
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#define CPU_FTR_DABRX LONG_ASM_CONST(0x0800000000000000)
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#define CPU_FTR_DABRX LONG_ASM_CONST(0x0800000000000000)
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#define CPU_FTR_PMAO_BUG LONG_ASM_CONST(0x1000000000000000)
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#define CPU_FTR_PMAO_BUG LONG_ASM_CONST(0x1000000000000000)
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#define CPU_FTR_POWER9_DD1 LONG_ASM_CONST(0x4000000000000000)
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#define CPU_FTR_POWER9_DD1 LONG_ASM_CONST(0x4000000000000000)
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+#define CPU_FTR_POWER9_DD20 LONG_ASM_CONST(0x8000000000000000)
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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@@ -477,6 +478,7 @@ enum {
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CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP | CPU_FTR_ARCH_300)
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CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP | CPU_FTR_ARCH_300)
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#define CPU_FTRS_POWER9_DD1 ((CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD1) & \
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#define CPU_FTRS_POWER9_DD1 ((CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD1) & \
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(~CPU_FTR_SAO))
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(~CPU_FTR_SAO))
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+#define CPU_FTRS_POWER9_DD20 (CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD20)
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#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
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#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
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CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
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CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
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CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
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CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
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@@ -495,7 +497,8 @@ enum {
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(CPU_FTRS_POWER4 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
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(CPU_FTRS_POWER4 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
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CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
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CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
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CPU_FTRS_POWER8 | CPU_FTRS_POWER8_DD1 | CPU_FTRS_CELL | \
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CPU_FTRS_POWER8 | CPU_FTRS_POWER8_DD1 | CPU_FTRS_CELL | \
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- CPU_FTRS_PA6T | CPU_FTR_VSX | CPU_FTRS_POWER9 | CPU_FTRS_POWER9_DD1)
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+ CPU_FTRS_PA6T | CPU_FTR_VSX | CPU_FTRS_POWER9 | \
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+ CPU_FTRS_POWER9_DD1 | CPU_FTRS_POWER9_DD20)
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#endif
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#endif
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#else
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#else
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enum {
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enum {
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