|
@@ -416,6 +416,14 @@ void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc)
|
|
|
I915_WRITE(SOFT_SCRATCH(15), val & ~msg);
|
|
|
spin_unlock(&guc->irq_lock);
|
|
|
|
|
|
+ intel_guc_to_host_process_recv_msg(guc, msg);
|
|
|
+}
|
|
|
+
|
|
|
+void intel_guc_to_host_process_recv_msg(struct intel_guc *guc, u32 msg)
|
|
|
+{
|
|
|
+ /* Make sure to handle only enabled messages */
|
|
|
+ msg &= guc->msg_enabled_mask;
|
|
|
+
|
|
|
if (msg & (INTEL_GUC_RECV_MSG_FLUSH_LOG_BUFFER |
|
|
|
INTEL_GUC_RECV_MSG_CRASH_DUMP_POSTED))
|
|
|
intel_guc_log_handle_flush_event(&guc->log);
|