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@@ -452,8 +452,6 @@ out_err:
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static int ssi_hw_init(struct hsi_controller *ssi)
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{
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struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
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- unsigned int i;
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- u32 val;
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int err;
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err = pm_runtime_get_sync(ssi->device.parent);
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@@ -461,27 +459,12 @@ static int ssi_hw_init(struct hsi_controller *ssi)
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dev_err(&ssi->device, "runtime PM failed %d\n", err);
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return err;
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}
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- /* Reseting SSI controller */
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- writel_relaxed(SSI_SOFTRESET, omap_ssi->sys + SSI_SYSCONFIG_REG);
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- val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
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- for (i = 0; ((i < 20) && !(val & SSI_RESETDONE)); i++) {
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- msleep(20);
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- val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
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- }
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- if (!(val & SSI_RESETDONE)) {
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- dev_err(&ssi->device, "SSI HW reset failed\n");
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- pm_runtime_put_sync(ssi->device.parent);
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- return -EIO;
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- }
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/* Reseting GDD */
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writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG);
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/* Get FCK rate in KHz */
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omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000);
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dev_dbg(&ssi->device, "SSI fck rate %lu KHz\n", omap_ssi->fck_rate);
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- /* Set default PM settings */
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- val = SSI_AUTOIDLE | SSI_SIDLEMODE_SMART | SSI_MIDLEMODE_SMART;
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- writel_relaxed(val, omap_ssi->sys + SSI_SYSCONFIG_REG);
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- omap_ssi->sysconfig = val;
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+
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writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG);
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omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON;
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pm_runtime_put_sync(ssi->device.parent);
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