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@@ -117,10 +117,22 @@ static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long flags;
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unsigned long flags;
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u32 reg;
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u32 reg;
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- if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate))
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+ if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
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+ spin_lock_irqsave(nm->common.lock, flags);
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+
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+ /* most SoCs require M to be 0 if fractional mode is used */
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+ reg = readl(nm->common.base + nm->common.reg);
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+ reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
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+ writel(reg, nm->common.base + nm->common.reg);
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+
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+ spin_unlock_irqrestore(nm->common.lock, flags);
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+
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+ ccu_frac_helper_enable(&nm->common, &nm->frac);
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+
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return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate);
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return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate);
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- else
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+ } else {
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ccu_frac_helper_disable(&nm->common, &nm->frac);
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ccu_frac_helper_disable(&nm->common, &nm->frac);
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+ }
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_nm.min_n = nm->n.min ?: 1;
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_nm.min_n = nm->n.min ?: 1;
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_nm.max_n = nm->n.max ?: 1 << nm->n.width;
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_nm.max_n = nm->n.max ?: 1 << nm->n.width;
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