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@@ -147,7 +147,8 @@ static int xhci_start(struct xhci_hcd *xhci)
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"waited %u microseconds.\n",
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XHCI_MAX_HALT_USEC);
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if (!ret)
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- xhci->xhc_state &= ~(XHCI_STATE_HALTED | XHCI_STATE_DYING);
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+ /* clear state flags. Including dying, halted or removing */
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+ xhci->xhc_state = 0;
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return ret;
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}
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@@ -1108,8 +1109,8 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
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/* Resume root hubs only when have pending events. */
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status = readl(&xhci->op_regs->status);
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if (status & STS_EINT) {
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- usb_hcd_resume_root_hub(hcd);
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usb_hcd_resume_root_hub(xhci->shared_hcd);
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+ usb_hcd_resume_root_hub(hcd);
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}
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}
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@@ -1124,10 +1125,10 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
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/* Re-enable port polling. */
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xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
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- set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
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- usb_hcd_poll_rh_status(hcd);
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set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
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usb_hcd_poll_rh_status(xhci->shared_hcd);
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+ set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
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+ usb_hcd_poll_rh_status(hcd);
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return retval;
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}
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@@ -2773,7 +2774,8 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
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if (ret <= 0)
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return ret;
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xhci = hcd_to_xhci(hcd);
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- if (xhci->xhc_state & XHCI_STATE_DYING)
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+ if ((xhci->xhc_state & XHCI_STATE_DYING) ||
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+ (xhci->xhc_state & XHCI_STATE_REMOVING))
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return -ENODEV;
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xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
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@@ -3820,7 +3822,7 @@ static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
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mutex_lock(&xhci->mutex);
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- if (xhci->xhc_state) /* dying or halted */
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+ if (xhci->xhc_state) /* dying, removing or halted */
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goto out;
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if (!udev->slot_id) {
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@@ -4948,6 +4950,16 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
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return retval;
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xhci_dbg(xhci, "Reset complete\n");
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+ /*
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+ * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0)
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+ * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit
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+ * address memory pointers actually. So, this driver clears the AC64
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+ * bit of xhci->hcc_params to call dma_set_coherent_mask(dev,
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+ * DMA_BIT_MASK(32)) in this xhci_gen_setup().
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+ */
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+ if (xhci->quirks & XHCI_NO_64BIT_SUPPORT)
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+ xhci->hcc_params &= ~BIT(0);
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+
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/* Set dma_mask and coherent_dma_mask to 64-bits,
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* if xHC supports 64-bit addressing */
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if (HCC_64BIT_ADDR(xhci->hcc_params) &&
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