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@@ -64,7 +64,12 @@ static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
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unsigned long new_time;
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- new_time = rtc_tm_to_time64(tm);
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+ /*
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+ * The value written will be updated after 1 sec into the
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+ * seconds read register, so we need to program time +1 sec
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+ * to get the correct time on read.
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+ */
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+ new_time = rtc_tm_to_time64(tm) + 1;
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if (new_time > RTC_SEC_MAX_VAL)
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return -EINVAL;
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@@ -78,14 +83,44 @@ static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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writel(new_time, xrtcdev->reg_base + RTC_SET_TM_WR);
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+ /*
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+ * Clear the rtc interrupt status register after setting the
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+ * time. During a read_time function, the code should read the
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+ * RTC_INT_STATUS register and if bit 0 is still 0, it means
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+ * that one second has not elapsed yet since RTC was set and
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+ * the current time should be read from SET_TIME_READ register;
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+ * otherwise, CURRENT_TIME register is read to report the time
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+ */
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+ writel(RTC_INT_SEC, xrtcdev->reg_base + RTC_INT_STS);
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+
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return 0;
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}
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static int xlnx_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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+ u32 status;
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+ unsigned long read_time;
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struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
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- rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_CUR_TM), tm);
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+ status = readl(xrtcdev->reg_base + RTC_INT_STS);
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+
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+ if (status & RTC_INT_SEC) {
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+ /*
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+ * RTC has updated the CURRENT_TIME with the time written into
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+ * SET_TIME_WRITE register.
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+ */
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+ rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_CUR_TM), tm);
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+ } else {
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+ /*
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+ * Time written in SET_TIME_WRITE has not yet updated into
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+ * the seconds read register, so read the time from the
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+ * SET_TIME_WRITE instead of CURRENT_TIME register.
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+ * Since we add +1 sec while writing, we need to -1 sec while
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+ * reading.
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+ */
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+ read_time = readl(xrtcdev->reg_base + RTC_SET_TM_RD) - 1;
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+ rtc_time64_to_tm(read_time, tm);
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+ }
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return rtc_valid_tm(tm);
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}
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@@ -166,11 +201,9 @@ static irqreturn_t xlnx_rtc_interrupt(int irq, void *id)
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if (!(status & (RTC_INT_SEC | RTC_INT_ALRM)))
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return IRQ_NONE;
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- /* Clear interrupt */
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- writel(status, xrtcdev->reg_base + RTC_INT_STS);
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+ /* Clear RTC_INT_ALRM interrupt only */
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+ writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_STS);
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- if (status & RTC_INT_SEC)
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- rtc_update_irq(xrtcdev->rtc, 1, RTC_IRQF | RTC_UF);
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if (status & RTC_INT_ALRM)
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rtc_update_irq(xrtcdev->rtc, 1, RTC_IRQF | RTC_AF);
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